This makes DwarfRegNum to accept list of numbers instead.
Added three different "flavours", but only slightly tested on x86-32/linux.
Please check another subtargets if possible,

llvm-svn: 43997

between two registers in the specific class.

llvm-svn: 42123

llvm-svn: 41863

llvm-svn: 40518

llvm-svn: 40132

InOperandList. This gives one piece of important information: # of results
produced by an instruction.
An example of the change:
def ADD32rr  : I<0x01, MRMDestReg, (ops GR32:$dst, GR32:$src1, GR32:$src2),
                 "add{l} {$src2, $dst|$dst, $src2}",
                 [(set GR32:$dst, (add GR32:$src1, GR32:$src2))]>;
=>
def ADD32rr  : I<0x01, MRMDestReg, (outs GR32:$dst), (ins GR32:$src1, GR32:$src2),
                 "add{l} {$src2, $dst|$dst, $src2}",
                 [(set GR32:$dst, (add GR32:$src1, GR32:$src2))]>;

llvm-svn: 40033

llvm-svn: 38500

llvm-svn: 37959

llvm-svn: 37930

- Added two variants of PredicateOperand: ImmutablePredicateOperand, whose predicate does not change after isel; PredicateDefOperand, which represent a predicate defintion operand.

llvm-svn: 37892

instruction flag, and use the flag along with a virtual member function
hook for targets to override if there are instructions that are only
trivially rematerializable with specific operands (i.e. constant pool
loads).

llvm-svn: 37728

with a general target hook to identify rematerializable instructions. Some
instructions are only rematerializable with specific operands, such as loads
from constant pools, while others are always rematerializable. This hook
allows both to be identified as being rematerializable with the same
mechanism.

llvm-svn: 37644

llvm-svn: 37643

llvm-svn: 37572

llvm-svn: 37466

llvm-svn: 37117

llvm-svn: 36947

feature is set, then the features in the implied list should be set also.
The opposite is also enforced: if a feature in the implied list isn't set,
then the feature that owns that implies list shouldn't be set either.

llvm-svn: 36756

llvm-svn: 36658

llvm-svn: 36618

llvm-svn: 36278

llvm-svn: 35160

llvm-svn: 34661

llvm-svn: 34456

llvm-svn: 33537

llvm-svn: 33114

llvm-svn: 31768

llvm-svn: 31437

llvm-svn: 31436

llvm-svn: 31332

llvm-svn: 30907

llvm-svn: 29193

M_LOOK_UP_PTR_REG_CLASS which allows the register class of the operand to be
resolved via a callback at runtime.

llvm-svn: 28387

llvm-svn: 28377

llvm-svn: 28368

can just add lib/Target to TableGen includes.

llvm-svn: 28318

llvm-svn: 28307

llvm-svn: 28283

llvm-svn: 28037

llvm-svn: 27843