and APFloat::convertToInteger.  Restore return value to
IEEE754.  Adjust all users accordingly.

llvm-svn: 57329

make it clearer what the function does.  No functional
change.

llvm-svn: 57325

llvm-svn: 57318

g++dg/abi/key2.C

llvm-svn: 57309

llvm-svn: 57295

GCC 4.4.0 gives an error on the "int" declaration for example
saying that it has already been declared (using the "short"
one). Using templates here allow the compiler to distinguish
between the function to choose.

Also, "llvm/Support/DataTypes.h" was not included, leading to
error messages about not knowing "uint32_t" for example.

Patch by Samuel Tardieu.

llvm-svn: 57292

Patch by Samuel Tardieu.

llvm-svn: 57291

SDISel typically adds them in. This makes it a little easier
to compare FastISel output with SDISel output.

llvm-svn: 57266

X86::CL that was used, emit an EXTRACT_SUBREG from the CL
super-register to CL. This more precisely describes how the
CL register is being used.

llvm-svn: 57264

Unconditional branch instruction encoding fix. Needs to use ABI, not AXI, to get the proper opcode bits.

llvm-svn: 57262

llvm-svn: 57261

llvm-svn: 57259

llvm-svn: 57258

Fixes local RA miscompilation of gcc.c-torture/execute/20020904-1.c -O0.

llvm-svn: 57257

Clarify naming and correct conditional so that CMP and CMN instructions get the Rn operand encoded properly

llvm-svn: 57252

llvm-svn: 57251

Certain patterns involving the "movss" instruction were marked as requiring SSE2, when in reality movss is an SSE1 instruction.

llvm-svn: 57246

llvm-svn: 57226

llvm-svn: 57210

optimized for size. Set OptForSize for each function separately.

llvm-svn: 57182

llvm-svn: 57179

Patch by Robert G. Jakabosky!

llvm-svn: 57110

llvm-svn: 57106

llvm-svn: 57096

llvm-svn: 57048

Make it all work in non-pic mode.

llvm-svn: 57034

incidentally making the case where the memop is a
pointer deref work.  Fix cmp-and-swap regression.

llvm-svn: 57027

Instead, just create one, and make sure everything that needs
it can access it. Previously most of the SelectionDAGISel
subclasses all had their own TargetLowering object, which was
redundant with the TargetLowering object in the TargetMachine
subclasses, except on Sparc, where SparcTargetMachine
didn't have a TargetLowering object. Change Sparc to work
more like the other targets here.

llvm-svn: 57016

llvm-svn: 57014

reg->reg moves.

llvm-svn: 57011

NeedStub/DoesntNeedStub logic was reversed, leading to not using a stub
for global relocations that do need them (libc calls, for example).

llvm-svn: 57010

isReg, etc., from isRegister, etc.

llvm-svn: 57006

getting inserted into the ValueMap. This avoids infinite
recursion in some rare cases.

llvm-svn: 56989

sequences like this:
       sete    %al
       testb   %al, %al
       jne     LBB11_1
with this:
       je      LBB11_1

llvm-svn: 56969

llvm-svn: 56963

local register allocator's physreg liveness doesn't recognize subregs,
so it doesn't know that defs of %ecx that are immediately followed by
uses of %cl aren't dead. This comes up due to the way fast-isel emits
shift instructions.

This is a temporary workaround. Arguably, local regalloc should
handle subreg references correctly. On the other hand, perhaps
fast-isel should use INSERT_SUBREG instead of just assigning to the
most convenient super-register of %cl when lowering shifts.

This fixes MultiSource/Benchmarks/MallocBench/espresso,
MultiSource/Applications/hexxagon, and others, under -fast.

llvm-svn: 56947

a constant vector ("{0x123, 0x456}" syntax).  The fix is to simplify the
_mm_srli_si128 macro, and  move the "* 8" from the macro into the compiler
back-end.  I can't change the existing __builtins because so many people are
using them :-(."
Patch by Stuart Hastings!

llvm-svn: 56944

llvm-svn: 56937

This allows the 64-bit forms to use+def RSP instead of ESP. This
doesn't fix any real bugs today, but it is more precise and it
makes the debug dumps on x86-64 look more consistent.

Also, add some comments describing the CALL instructions' physreg
operand uses and defs.

llvm-svn: 56925

llvm-svn: 56924