This lets lldb give sane output for SmallVectors, e.g.
Before:
(lldb) p sv
(llvm::SmallVector<int, 10>) $0 = {
  (llvm::SmallVectorImpl<int>) llvm::SmallVectorImpl<int> = {
    (llvm::SmallVectorTemplateBase<int>) llvm::SmallVectorTemplateBase<int> = {
      (llvm::SmallVectorTemplateCommon<int>) llvm::SmallVectorTemplateCommon<int> = {
        (llvm::SmallVectorBase) llvm::SmallVectorBase = {
          (void *) BeginX = 0x00007fff5fbff960
...
}

After:
(lldb) p sv
(llvm::SmallVector<int, 10>) $0 = {
  (int) [0] = 42
  (int) [1] = 23
...
}

The script is still a bit rough so expect crashes for vectors of complex types.
Synthetic children are _not_ available in xcode 4.2, newer LLDBs should work though.

llvm-svn: 148308

Instead, we now put the attributes of the container into members.

llvm-svn: 148302

llvm-svn: 148301

implementation.
Currently lit still executes ExecutionEngine tests with JIT (not MCJIT) by
default. MCJIT tests can be executed manually by calling llvm-lit with
--param jit_impl=mcjit

llvm-svn: 148299

In CanXFormVExtractWithShuffleIntoLoad we assumed that EXTRACT_VECTOR_ELT can be later handled by the DAGCombiner.
However, in some cases on AVX, the EXTRACT_VECTOR_ELT is legalized to EXTRACT_SUBVECTOR + EXTRACT_VECTOR_ELT, which
currently is not handled by the DAGCombiner. In this patch I added a check that we only extract from the XMM part.

llvm-svn: 148298

llvm-svn: 148297

llvm-svn: 148295

llvm-svn: 148293

llvm-svn: 148291

Responding to code review.

llvm-svn: 148290

More short term hackery until we have a way to configure passes that work on LiveIntervals.

llvm-svn: 148289

It's becoming clear that LoopSimplify needs to unconditionally create loop preheaders. But that is a bigger fix. For now, continuing to hack LSR.
Fixes rdar://10701050 "Cannot split an edge from an IndirectBrInst" assert.

llvm-svn: 148288

Fix a crasher when PerformShiftCombine receives a BUILD_VECTOR of all UNDEF. Probably could use better handling in DAG combine or getNode. Fixes PR11772.

llvm-svn: 148285

llvm-svn: 148284

or clang bootstrap.

I will keep an eye on the bots.

Original message:
Only emit the Leh_func_endN symbol when needed.

llvm-svn: 148283

And fix the comment about where the FilesToConfig variable
is.

llvm-svn: 148282

Changed flag operand of ISD::FP_ROUND to TargetConstant as it should not get checked for legalisation

llvm-svn: 148275

llvm-svn: 148274

BitVector uses the native word size for its internal representation.
That doesn't work well for literal bit masks in source code.

This patch adds BitVector operations to efficiently apply literal bit
masks specified as arrays of uint32_t.  Since each array entry always
holds exactly 32 bits, these portable bit masks can be source code
literals, probably produced by TableGen.

llvm-svn: 148272

llvm-svn: 148268

llvm-svn: 148265

llvm-svn: 148264

llvm-svn: 148263

Removing unused default switch cases in switches over enums that already account for all enumeration values explicitly.

(This time I believe I've checked all the -Wreturn-type warnings from GCC & added the couple of llvm_unreachables necessary to silence them. If I've missed any, I'll happily fix them as soon as I know about them)

llvm-svn: 148262

No test case: output assembly will be identical.

llvm-svn: 148261

AggressiveAntiDepBreaker needs to skip debug values because a debug value does not have a corresponding SUnit

llvm-svn: 148260

It is safe to move uses of such registers.

llvm-svn: 148259

Move to a by-section allocation and relocation scheme. This allows
better support for sections which do not contain externally visible
symbols.

Flesh out the relocation address vs. local storage address separation a
bit more as well. Remote process JITs use this to tell the relocation
resolution code where the code will live when it executes.

The startFunctionBody/endFunctionBody interfaces to the JIT and the
memory manager are deprecated. They'll stick around for as long as the
old JIT does, but the MCJIT doesn't use them anymore.

llvm-svn: 148258

llvm-svn: 148252

llvm-svn: 148251

Register masks will be used as a compact representation of large clobber
lists.  Currently, an x86 call instruction has some 40 operands
representing call-clobbered registers.  That's more than 1kB of useless
operands per call site.

A register mask operand references a bit mask of call-preserved
registers, everything else is clobbered.  The bit mask will typically
come from TargetRegisterInfo::getCallPreservedMask().

By abandoning ImplicitDefs for call-clobbered registers, it also becomes
possible to share call instruction descriptions between calling
conventions, and we can get rid of the WINCALL* instructions.

This patch introduces the new operand kind.  Future patches will add
RegMask support to target-independent passes before finally the fixed
clobber lists can be removed from call instruction descriptions.

llvm-svn: 148250

llvm-svn: 148240

llvm-svn: 148239

Committed as obvious

llvm-svn: 148237

llvm-svn: 148233

A fix for the previous commit: "integer constant is too large for ‘long’ type" error on some 32-bit bots

llvm-svn: 148232

Adding a basic ELF dynamic loader and MC-JIT for ELF. Functionality is currently basic and will be enhanced with future patches.
Patch developed by Andy Kaylor and Daniel Malea. Reviewed on llvm-commits.

llvm-svn: 148231

llvm-svn: 148230

Changed intrinsic ID operand to a target constant as its not used in any arithmetic so should not be checked in legalisation

llvm-svn: 148228

We know that the blend instructions only use the MSB, so if the mask is
sign-extended then we can convert it into a SHL instruction. This is a
common pattern because the type-legalizer sign-extends the i1 type which
is used by the LLVM-IR for the condition.

Added a new optimization in SimplifyDemandedBits for SIGN_EXTEND_INREG -> SHL.

llvm-svn: 148225