now, in addition to cpu type/subtype and architecture flavor, contains:
- byte order (big endian, little endian)
- address size in bytes
- llvm::Triple for true target triple support and for more powerful plug-in
  selection.

llvm-svn: 125602

methods of EmulateInstructionARM class.  The context data structure should provide sufficient
information already.

llvm-svn: 125596

llvm-svn: 125593

Add EmulateASRImm() Encodings T1, T2, and A1 to the opcodes tables.

llvm-svn: 125592

Add code to emulate STMIB Arm instruction.

llvm-svn: 125580

Add code to emulate STMDB Arm instruction.

Add some bit-mask fixes to code for getting register bits for various LDM and STM instructions.

llvm-svn: 125578

Add a bunch of utilities and an enum (ARM_ShifterType) for shift and rotate operations pertaining to:

o A2.2.1 Pseudocode details of shift and rotate operations
o A8.4.3 Pseudocode details of instruction-specified shifts and rotates

llvm-svn: 125575

because it's already been done within ReadInstruction().

llvm-svn: 125569

Add code to emulate the STMDA Arm instruction.

llvm-svn: 125542

ArchDefaultUnwindPlan plug-in interfaces are now cached per architecture 
instead of being leaked for every frame.

Split the ArchDefaultUnwindPlan_x86 into ArchDefaultUnwindPlan_x86_64 and
ArchDefaultUnwindPlan_i386 interfaces.

There were sporadic crashes that were due to something leaking or being 
destroyed when doing stack crawls. This patch should clear up these issues.

llvm-svn: 125541

llvm-svn: 125533

llvm-svn: 125531

  various types and numbers of arguments rather than trying to keep a
  constant number of arguments for all the types.

- Also create a Register type within the instructions, to hold
  register type and number.

- Modify EmulateInstructionArm.cpp to use the new register and context
  types in all the instruction emulation functions.

- Add code to emulate the STM Arm instruction.

llvm-svn: 125528

table.  Modify EmulateInstructionARM::EvaluateInstruction() so that if the cpsr has changed
during evaluate instruction, we flush out the change into m_inst_cpsr in preparation for the next
instruction.

llvm-svn: 125524

the context of eContextImmediate type, since the immediate value is known from the
argument value to WriteRegisterUnsigned() callback already.

llvm-svn: 125518

llvm-svn: 125509

an imm12 into imm32 for ARM or Thumb so that they now handle carry_in/carry_out.
Funnel ARMExpandImm()/ThumbExpandImm() to the enhanced ARMExpandImm_C()/ThumbExpandImm_C()
functions.

llvm-svn: 125508

are supported by the remote GDB target. We can also now deal with the lack of
vCont support and send packets that the remote GDB stub can use. We also error
out of the continue if LLDB tries to do something too complex when vCont isn't
supported.

llvm-svn: 125433

tables.  The corresponding EmulateMvnRdImm() method impl is empty for now.

llvm-svn: 125425

llvm-svn: 125423

instead of calling out to m_it_session.InITBlock()/LastInITBlock(), which simplifies
the coding a bit.

llvm-svn: 125421

llvm-svn: 125418

llvm-svn: 125416

- Add three more instruction contexts to EmulateInstruction:
eContextAdjustBaseRegister, eContextRegisterStore and
eContextWriteMemoryRandomBits.

- Implement a version of WriteBits32UnknownToMemory for writing to memory.

- Modify EmulateLDM, EmulateLDMDA, EmulateLDMDB and EmulateLDMIB to use the
eContextAdjustBaseRegister context when appropriate.

- Add code to emulate the STM/STMIA/STMEA Arm instruction.

llvm-svn: 125414

CMP (register) operations.

llvm-svn: 125413

llvm-svn: 125405

llvm-svn: 125392

Change the method name from *LDRRdPCRelative to *LDRRtPCRelative to be compliant
with the ARM Arch Manual which uses Rt for the destination register.

llvm-svn: 125390

llvm-svn: 125379

Add new utility function, WriteBits32Unknown

Modify the LDM* instruction emulation functions to call WriteBits32Unknown.
Add missing overview comments to the LDM* instruction emulation functions.

Add code to emulate LDMDA Arm instruction.

llvm-svn: 125377

llvm-svn: 125333

llvm-svn: 125329

- Objective-C constant strings were being
  NULL-terminated erroneously.

- Empty Objective-C constant strings were not
  being generated correctly.

Also added the template for a test of these
fixes.

llvm-svn: 125314

llvm-svn: 125313

SetBits32(uint32_t &bits, uint32_t bit, uint32_t val) to SetBit32(bits, bit, val).

llvm-svn: 125312

Some refactorings to use the convenience function: Bits32(const uint32_t value, const uint32_t bit).

llvm-svn: 125303

llvm-svn: 125302

table.  Also add some more defines and convenience functions.

llvm-svn: 125300

llvm-svn: 125295

llvm-svn: 125269