- Sep 07, 2011
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Jim Grosbach authored
Handle explicit 'ia' suffix via a MnemonicAlias (pre-existing). llvm-svn: 139234
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Rafael Espindola authored
(not assert) early. llvm-svn: 139233
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Jim Grosbach authored
llvm-svn: 139232
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Bill Wendling authored
information for older linkers. llvm-svn: 139206
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Jim Grosbach authored
llvm-svn: 139202
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Jim Grosbach authored
llvm-svn: 139200
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Jim Grosbach authored
llvm-svn: 139193
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Jim Grosbach authored
llvm-svn: 139191
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- Sep 06, 2011
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Jim Grosbach authored
llvm-svn: 139188
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Eli Friedman authored
llvm-svn: 139179
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Jim Grosbach authored
llvm-svn: 139172
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Rafael Espindola authored
llvm-svn: 139161
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Duncan Sands authored
with a vector condition); such selects become VSELECT codegen nodes. This patch also removes VSETCC codegen nodes, unifying them with SETCC nodes (codegen was actually often using SETCC for vector SETCC already). This ensures that various DAG combiner optimizations kick in for vector comparisons. Passes dragonegg bootstrap with no testsuite regressions (nightly testsuite as well as "make check-all"). Patch mostly by Nadav Rotem. llvm-svn: 139159
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Evan Cheng authored
Now the 'S' instructions, e.g. ADDS, treat S bit as optional operand as well. Also fix isel hook to correctly set the optional operand. rdar://10073745 llvm-svn: 139157
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Jim Grosbach authored
Even if there's no mode switch performed, the .code directive should still be sent to the output streamer. Otherwise, for example, an output asm stream is not equivalent to the input stream which generated it (a dependency on the input target triple arm vs. thumb is introduced which was not originally there). llvm-svn: 139155
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Rafael Espindola authored
llvm-svn: 139154
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Jakob Stoklund Olesen authored
llvm-svn: 139148
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Duncan Sands authored
init.trampoline and adjust.trampoline intrinsics, into two intrinsics like in GCC. While having one combined intrinsic is tempting, it is not natural because typically the trampoline initialization needs to be done in one function, and the result of adjust trampoline is needed in a different (nested) function. To get around this llvm-gcc hacks the nested function lowering code to insert an additional parent variable holding the adjust.trampoline result that can be accessed from the child function. Dragonegg doesn't have the luxury of tweaking GCC code, so it stored the result of adjust.trampoline in the memory GCC set aside for the trampoline itself (this is always available in the child function), and set up some new memory (using an alloca) to hold the trampoline. Unfortunately this breaks Go which allocates trampoline memory on the heap and wants to use it even after the parent has exited (!). Rather than doing even more hacks to get Go working, it seemed best to just use two intrinsics like in GCC. Patch mostly by Sanjoy Das. llvm-svn: 139140
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- Sep 05, 2011
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Nick Lewycky authored
instructions are more aligned than the CPU requires, and adds some additional directives, to follow in future patches. Patch by David Meyer! llvm-svn: 139125
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Nick Lewycky authored
llvm-svn: 139124
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Nick Lewycky authored
llvm-svn: 139122
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- Sep 03, 2011
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Benjamin Kramer authored
llvm-svn: 139079
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Bruno Cardoso Lopes authored
the cycle of missing AVX counterparts of already present SSE* patterns llvm-svn: 139073
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Bruno Cardoso Lopes authored
llvm-svn: 139072
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Bruno Cardoso Lopes authored
llvm-svn: 139071
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Bruno Cardoso Lopes authored
llvm-svn: 139070
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Bruno Cardoso Lopes authored
llvm-svn: 139069
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Bruno Cardoso Lopes authored
duplicate it for AVX mode. llvm-svn: 139068
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Bruno Cardoso Lopes authored
llvm-svn: 139067
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Bruno Cardoso Lopes authored
that the AVX versions (even the 128-bit ones) all clear the upper part of the destination register. llvm-svn: 139066
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Bruno Cardoso Lopes authored
pattern should be matched llvm-svn: 139065
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Bruno Cardoso Lopes authored
llvm-svn: 139064
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Bruno Cardoso Lopes authored
it! llvm-svn: 139063
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Bruno Cardoso Lopes authored
llvm-svn: 139062
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Bruno Cardoso Lopes authored
llvm-svn: 139061
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Bruno Cardoso Lopes authored
OptForSize pattern llvm-svn: 139060
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Jakob Stoklund Olesen authored
The explanation about a 0 argument being materialized as xor is no longer valid. Rematerialization will check if EFLAGS is live before clobbering it. The code produced by X86TargetLowering::EmitLoweredSelect does not clobber EFLAGS. This causes one less testb instruction to be generated in the cmov.ll test case. llvm-svn: 139057
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Jakob Stoklund Olesen authored
It is only allowed to clobber EFLAGS at the end of a block if it isn't live-in to any successor. llvm-svn: 139056
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Jakob Stoklund Olesen authored
llvm-svn: 139055
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Jim Grosbach authored
llvm-svn: 139053
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