llvm-svn: 137804

llvm-svn: 137515

New approach to r136737: insert the necessary fences for atomic ops in platform-independent code, since a bunch of platforms (ARM, Mips, PPC, Alpha are the relevant targets here) need to do essentially the same thing.

I think this completes the basic CodeGen for atomicrmw and cmpxchg.

llvm-svn: 136813

llvm-svn: 136283

llvm-svn: 135537

llvm-svn: 135522

ANDi, when the instruction does not have any immediate operands.

llvm-svn: 135520

llvm-svn: 135514

llvm-svn: 135496

- In EmitAtomicBinaryPartword, mask incr in loopMBB only if atomic.swap is the
  instruction being expanded, instead of masking it in thisMBB. 
- Remove redundant Or in EmitAtomicCmpSwap. 

llvm-svn: 135495

basic blocks.

llvm-svn: 135490

ExpandISelPseudos::runOnMachineFunction does not visit instructions that have
just been added.

llvm-svn: 135465

llvm-svn: 135464

llvm-svn: 135418

moving them out of the loop. Previously, stores and loads to a stack frame
object were inserted to accomplish this. Remove the code that was needed to do
this. Patch by Sasa Stankovic.

llvm-svn: 135415

virtual registers are used. 

llvm-svn: 135403

llvm-svn: 135375

is to use this for architectures that have a native FMA instruction.

llvm-svn: 134742

llvm-svn: 134661

before the offset. This change will enable simplification of function
MipsRegisterInfo::eliminateFrameIndex.

llvm-svn: 134625

llvm-svn: 134087

Part of rdar://9643582

llvm-svn: 134084

 enables SelectionDAG::getLoad at MipsISelLowering.cpp:1914 to return a
pre-existing node instead of redundantly create a new node every time it is
called.

llvm-svn: 133811

llvm-svn: 133496

llvm-svn: 133494

llvm-svn: 133118

llvm-svn: 132777

No functional change.

Part of PR6965

llvm-svn: 132763

dynamically allocated stack area was not set.

llvm-svn: 132758

llvm-svn: 132756

llvm-svn: 132726

- Fix indentation.
- Move comments.
- Fit lines in 80 columns.
- Remove dead code.

llvm-svn: 132724

llvm-svn: 132444

llvm-svn: 132355

nand), atomic.swap and atomic.cmp.swap, all in i8, i16 and i32 versions.
The intrinsics are implemented by creating pseudo-instructions, which are
then expanded in the method MipsTargetLowering::EmitInstrWithCustomInserter.

Patch by Sasa Stankovic.

llvm-svn: 132323

Dynamic, Initial Exec and Local Exec TLS models.

Patch by Sasa Stankovic

llvm-svn: 132322

Need this to prevent emitting illegal conditional move instructions. 

llvm-svn: 132240

a function has any function calls.

llvm-svn: 132140

llvm-svn: 132131

been defined in MipsInstrFPU.td.

llvm-svn: 132076