i8 field when they really do not.  This fixes rdar://7840289

llvm-svn: 101629

llvm-svn: 101559

case.  Also, the 0xFF hex literal involved in the shift for ESize64 should be
suffixed "ul" to preserve the shift result.

Implemented printHex*ImmOperand() by copying from ARMAsmPrinter.cpp and added a
test case for DisassembleN1RegModImmFrm()/printHex64ImmOperand().

llvm-svn: 101557

this patch removes the assert() from printAddrMode3OffsetOperand() and adds a test case.

llvm-svn: 101529

to the UAL syntax of LDCL<c>, instead.

Add a test case for this change which also tests the removal of assert() from
printAddrMode2OffsetOperand().

llvm-svn: 101527

Previous checkin tested Rn, #+/-Rm.

llvm-svn: 101418

am2offset.  Modified the instruction table entry and added a new test case.

llvm-svn: 101415

llvm-svn: 101337

current PC.  rdar://7834775

We now produce an identical .o file compared to the cctools
assembler for something like this:

_f0:
L0:
        jmp L1
        .long . - L0
L1:
        jmp A
        .long . - L1

        .zerofill __DATA,_bss,A,0

llvm-svn: 101227

ARM_AM::getSoImmVal(V) with a legitimate so_imm value: #245 rotate right by 2.
Introduce ARM_AM::getSOImmValOneOrNoRotate(unsigned Arg) which is called from
ARMInstPrinter.cpp's printSOImm() function, replacing ARM_AM::getSOImmVal(V).

[12:44:43] johnny:/Volumes/data/llvm/git/trunk (local-trunk) $ gdb Debug/bin/llvm-mc
GNU gdb 6.3.50-20050815 (Apple version gdb-1346) (Fri Sep 18 20:40:51 UTC 2009)
Copyright 2004 Free Software Foundation, Inc.
GDB is free software, covered by the GNU General Public License, and you are
welcome to change it and/or distribute copies of it under certain conditions.
Type "show copying" to see the conditions.
There is absolutely no warranty for GDB.  Type "show warranty" for details.
This GDB was configured as "x86_64-apple-darwin"...Reading symbols for shared libraries ... done

(gdb) set args  -triple=arm-apple-darwin9 -debug-only=arm-disassembler --disassemble
(gdb) r
Starting program: /Volumes/data/llvm/git/trunk/Debug/bin/llvm-mc -triple=arm-apple-darwin9 -debug-only=arm-disassembler --disassemble
Reading symbols for shared libraries ++. done
0xf5 0x71 0xf0 0x53
Opcode=201 Name=MVNi Format=ARM_FORMAT_DPFRM(4)
 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10  9  8  7  6  5  4  3  2  1  0 
-------------------------------------------------------------------------------------------------
| 0: 1: 0: 1| 0: 0: 1: 1| 1: 1: 1: 1| 0: 0: 0: 0| 0: 1: 1: 1| 0: 0: 0: 1| 1: 1: 1: 1| 0: 1: 0: 1|
-------------------------------------------------------------------------------------------------

	mvnpls	r7, Assertion failed: (V != -1 && "Not a valid so_imm value!"), function printSOImm, file ARMInstPrinter.cpp, line 229.

Program received signal SIGABRT, Aborted.
0x00007fff88c65886 in __kill ()
(gdb) bt
#0  0x00007fff88c65886 in __kill ()
#1  0x00007fff88d05eae in abort ()
#2  0x00007fff88cf2ef0 in __assert_rtn ()
#3  0x000000010020e422 in printSOImm (O=@0x1010bdf80, V=-1, VerboseAsm=false, MAI=0x1020106d0) at ARMInstPrinter.cpp:229
#4  0x000000010020e5fe in llvm::ARMInstPrinter::printSOImmOperand (this=0x1020107e0, MI=0x7fff5fbfee70, OpNum=1, O=@0x1010bdf80) at ARMInstPrinter.cpp:254
#5  0x00000001001ffbc0 in llvm::ARMInstPrinter::printInstruction (this=0x1020107e0, MI=0x7fff5fbfee70, O=@0x1010bdf80) at ARMGenAsmWriter.inc:3236
#6  0x000000010020c27c in llvm::ARMInstPrinter::printInst (this=0x1020107e0, MI=0x7fff5fbfee70, O=@0x1010bdf80) at ARMInstPrinter.cpp:182
#7  0x000000010003cbff in PrintInsts (DisAsm=@0x10200f4e0, Printer=@0x1020107e0, Bytes=@0x7fff5fbff060, SM=@0x7fff5fbff078) at Disassembler.cpp:65
#8  0x000000010003c8b4 in llvm::Disassembler::disassemble (T=@0x1010c13c0, Triple=@0x1010b6798, Buffer=@0x102010690) at Disassembler.cpp:153
#9  0x000000010004095c in DisassembleInput (ProgName=0x7fff5fbff3f0 "/Volumes/data/llvm/git/trunk/Debug/bin/llvm-mc") at llvm-mc.cpp:347
#10 0x000000010003eefb in main (argc=4, argv=0x7fff5fbff298) at llvm-mc.cpp:374
(gdb) q
The program is running.  Exit anyway? (y or n) y
[13:36:26] johnny:/Volumes/data/llvm/git/trunk (local-trunk) $ 

llvm-svn: 101053

llvm-svn: 100692

Reverting 100265 to try to get buildbots green again. Lots of self-hosting buildbots started complaining since this commit. Also xfail ARM disassembly tests.

llvm-svn: 100378

backend (ARMDecoderEmitter) which emits the decoder functions for ARM and Thumb,
and the disassembler core which invokes the decoder function and builds up the
MCInst based on the decoded Opcode.

Reviewed by Chris Latter and Bob Wilson.

llvm-svn: 100233

llvm-svn: 99853

opcode values fitting in one byte (svn r99494).

llvm-svn: 99514

MC: Fix refacto in MCExpr evaluation, I mistakenly replaced a fragment address with a symbol address.
 - This fixes the integrated-as nightly test regressions.

llvm-svn: 99466

--- Reverse-merging r99440 into '.':
U    test/MC/AsmParser/X86/x86_32-bit_cat.s
U    test/MC/AsmParser/X86/x86_32-encoding.s
U    include/llvm/IntrinsicsX86.td
U    include/llvm/CodeGen/SelectionDAGNodes.h
U    lib/Target/X86/X86InstrSSE.td
U    lib/Target/X86/X86ISelLowering.h

llvm-svn: 99450

llvm-svn: 99440

not get an "Unknown immediate size" assert failure when used.  All instructions 
of this form have an 8-bit immediate.  Also added a test case of an example
instruction that is of this form.

llvm-svn: 99435

llvm-svn: 99100

 - This also avoids us running valgrind on /usr/bin/as, which has leaks. :)

llvm-svn: 99099

override prefix and only the r/m16 forms should have had that.  Also for variant
one, the AT&T syntax, added suffixes to all forms.  Also added the missing
64-bit form for 'CRC32 r64, r/m8'.  Plus added test cases for all forms and
tweaked one test case to add the needed suffixes.

llvm-svn: 98980

 - This is "extraordinarily" Darwin 'as' compatible. See the litany of FIXMEs littered about for more information.
 - There are a few cases which seem to clearly be 'as' bugs which I have left unsupported, and there is one cases where we diverge but should fix if it blocks diffing .o files (Darwin 'as' ends up widening a jump unnecessarily).
 - 403.gcc build, runs, and diffs equivalently to the 'as' built version now (using llvm-mc). However, it builds so slowly that I wouldn't recommend trying it quite yet. :)

llvm-svn: 98974

MC/X86: Rename alternate spellings of {ADD64,CMP64} and mark as "code gen only" so they don't get selected by the asm matcher.

llvm-svn: 98972

llvm-svn: 98924

llvm-svn: 98919

were missing it on some movq instructions and were not including the appropriate
PCrel bias.

llvm-svn: 98880

temporary workaround for matching inc/dec on x86_64 to the correct instruction.
 - This hack will eventually be replaced with a robust mechanism for handling
   matching instructions based on the available target features.

llvm-svn: 98858

llvm-svn: 98855

files that produce special relocation types where the 
linker changes movq's into lea's.

llvm-svn: 98839

MC/Mach-O/x86_64: Temporary labels in cstring sections require symbols (and external relocations, but we don't have x86_64 relocations yet).

llvm-svn: 98583

llvm-svn: 98479

llvm-svn: 98476

llvm-svn: 98457

llvm-svn: 98456

llvm-svn: 98454

llvm-svn: 98444

llvm-svn: 98443

relative to the fragment address, not its offset. This was masked by the text
section normally being at address 0.

llvm-svn: 98420

other functionality on 403.gcc compiled at -O0.

llvm-svn: 98405