llvm-svn: 26562

llvm-svn: 26549

we want to canonicalize the other way.

llvm-svn: 26547

implement copysign as a native op if they have it.

llvm-svn: 26541

llvm-svn: 26539

llvm-svn: 26536

llvm-svn: 26523

llvm-svn: 26520

rep/stos and rep/mov if the count is not a constant. We could do
  rep/stosl; and $count, 3; rep/stosb
For now, I will lower them to memset / memcpy calls. We will revisit this after
a little bit experiment.

Also need to take care of the trailing bytes even if the count is a constant.
Since the max. number of trailing bytes are 3, we will simply issue loads /
stores.

llvm-svn: 26517

llvm-svn: 26513

llvm-svn: 26512

llvm-svn: 26503

llvm-svn: 26490

llvm-svn: 26479

llvm-svn: 26472

llvm-svn: 26450

llvm-svn: 26448

void foo(float a, int *b) { *b = a; }

to this:

_foo:
        fctiwz f0, f1
        stfiwx f0, 0, r4
        blr

instead of this:

_foo:
        fctiwz f0, f1
        stfd f0, -8(r1)
        lwz r2, -4(r1)
        stw r2, 0(r4)
        blr

This implements CodeGen/PowerPC/stfiwx.ll, and also incidentally does the
right thing for GCC bugzilla 26505.

llvm-svn: 26447

llvm-svn: 26445

llvm-svn: 26442

llvm-svn: 26438

llvm-svn: 26435

llvm-svn: 26430

llvm-svn: 26429

but I don't know what other PPC impls do.  If someone could update the proc
table, I would appreciate it :)

llvm-svn: 26421

llvm-svn: 26418

llvm-svn: 26405

llvm-svn: 26403

llvm-svn: 26399

PowerPC/div-2.ll

llvm-svn: 26392

on PowerPC/small-arguments.ll

llvm-svn: 26389

simplify the RHS.  This allows for the elimination of many thousands of
ands from multisource, and compiles CodeGen/PowerPC/and-elim.ll:test2
into this:

_test2:
        srwi r2, r3, 1
        xori r3, r2, 40961
        blr

instead of this:

_test2:
        rlwinm r2, r3, 31, 17, 31
        xori r2, r2, 40961
        rlwinm r3, r2, 0, 16, 31
        blr

llvm-svn: 26388

assertzext produces zero bits.

llvm-svn: 26386

than base).

llvm-svn: 26382

and 2005-05-12-Int64ToFP.

llvm-svn: 26380

* Cleaned up and tweaked LEA cost analysis code. Removed some hacks.
* Handle ADD $X, c to MOV32ri $X+c. These patterns cannot be autogen'd and
  they need to be matched before LEA.

llvm-svn: 26376

llvm-svn: 26375

* Add patterns to handle GlobalAddress, ConstantPool, etc.
  MOV32ri to materialize these nodes in registers.
  ADD32ri to handle %reg + GA, etc.
  MOV32mi to handle store GA, etc. to memory.

llvm-svn: 26374

llvm-svn: 26373

llvm-svn: 26372