When compiling in Thumb mode, only the low (R0-R7) registers are available
for most instructions. Breaking the low registers into a new register class
handles this. Uses of R12, SP, etc, are handled explicitly where needed
with copies inserted to move results into low registers where the rest of
the code generator can deal with them.

llvm-svn: 68545

llvm-svn: 46930

llvm-svn: 45418

This makes DwarfRegNum to accept list of numbers instead.
Added three different "flavours", but only slightly tested on x86-32/linux.
Please check another subtargets if possible,

llvm-svn: 43997

llvm-svn: 37897

llvm-svn: 36280

llvm-svn: 35021

llvm-svn: 34999

llvm-svn: 34711

llvm-svn: 34709

llvm-svn: 34701

llvm-svn: 33633

llvm-svn: 33455

llvm-svn: 33389

llvm-svn: 33353

llvm-svn: 31197

initial support for returning 64bit floating point numbers

llvm-svn: 30692

implement SINT_TO_FP

llvm-svn: 30673

llvm-svn: 29756

fixes test/Regression/CodeGen/ARM/ret_arg5.ll

llvm-svn: 28854

llvm-svn: 28301