- Apr 28, 2009
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Bill Wendling authored
llvm-svn: 70275
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Bill Wendling authored
use the old behavior, the flag is -O0. This change allows for finer-grained control over which optimizations are run at different -O levels. Most of this work was pretty mechanical. The majority of the fixes came from verifying that a "fast" variable wasn't used anymore. The JIT still uses a "Fast" flag. I'm not 100% sure if it's necessary to change it there... llvm-svn: 70270
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- Apr 27, 2009
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Nate Begeman authored
PR2957 ISD::VECTOR_SHUFFLE now stores an array of integers representing the shuffle mask internal to the node, rather than taking a BUILD_VECTOR of ConstantSDNodes as the shuffle mask. A value of -1 represents UNDEF. In addition to eliminating the creation of illegal BUILD_VECTORS just to represent shuffle masks, we are better about canonicalizing the shuffle mask, resulting in substantially better code for some classes of shuffles. llvm-svn: 70225
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Dan Gohman authored
to precisely describe the h-register subreg register classes. Thanks to Jakob Stoklund Olesen for spotting this and for the initial patch! Also, make getStoreRegOpcode and getLoadRegOpcode aware of the needs of h registers. llvm-svn: 70211
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Dan Gohman authored
GR32_ABCD, and GR64_ABCD, respectively, to help describe them. llvm-svn: 70210
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Dan Gohman authored
llvm-svn: 70209
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Mon P Wang authored
llvm-svn: 70197
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- Apr 25, 2009
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Chris Lattner authored
Nicolas Capens! llvm-svn: 70057
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Bob Wilson authored
f64 types. This is not used for anything yet. llvm-svn: 70006
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- Apr 24, 2009
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Bob Wilson authored
between registers and the stack may be required with the APCS ABI, but it isn't tied to using a particular version of the ARM architecture. llvm-svn: 69978
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Bob Wilson authored
chained and "flagged" together. I also made a few changes to handle the chain and flag values more consistently. I found these problems by inspection so I'm not aware of anything that breaks because of them (thus no testcase). llvm-svn: 69977
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Bob Wilson authored
should be bit-converted to i32, it is sufficient to list only i32 in subsequent definitions. llvm-svn: 69973
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Rafael Espindola authored
very elegant, but neither is the tls specification :-( llvm-svn: 69968
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Rafael Espindola authored
llvm-svn: 69967
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Nate Begeman authored
ISD::VECTOR_SHUFFLE now stores an array of integers representing the shuffle mask internal to the node, rather than taking a BUILD_VECTOR of ConstantSDNodes as the shuffle mask. A value of -1 represents UNDEF. In addition to eliminating the creation of illegal BUILD_VECTORS just to represent shuffle masks, we are better about canonicalizing the shuffle mask, resulting in substantially better code for some classes of shuffles. A clean up of x86 shuffle code, and some canonicalizing in DAGCombiner is next. llvm-svn: 69952
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Dan Gohman authored
llvm-svn: 69934
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- Apr 23, 2009
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Sanjiv Gupta authored
Banksel immediate constant will always immediately follow the GA/ES, so scan an insn from beginnin to find out the banksel operand. llvm-svn: 69883
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Dan Gohman authored
memory operand tuples. This doesn't ever come up in normal code however. llvm-svn: 69848
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- Apr 22, 2009
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Sanjiv Gupta authored
Make the function begin label start after ther data pointer. The address of data frame for function can be obtained by subtracting 2 from the function begin label. llvm-svn: 69801
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- Apr 21, 2009
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Duncan Sands authored
Spotted by gcc-4.5. llvm-svn: 69673
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Rafael Espindola authored
This fixes PR4002. llvm-svn: 69672
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Sanjiv Gupta authored
llvm-svn: 69665
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Dan Gohman authored
This makes the extra copyRegToReg calls in ScheduleDAGSDNodesEmit.cpp unnecessary. Derived from a patch by Jakob Stoklund Olesen. llvm-svn: 69635
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- Apr 20, 2009
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Daniel Dunbar authored
llvm-svn: 69624
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Bob Wilson authored
in the MachineFunction class, renaming it to addLiveIn for consistency with the same method in MachineBasicBlock. Thanks for Anton for suggesting this. llvm-svn: 69615
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Devang Patel authored
llvm-svn: 69613
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Sanjiv Gupta authored
llvm-svn: 69605
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- Apr 18, 2009
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Mon P Wang authored
llvm-svn: 69417
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Bill Wendling authored
llvm-svn: 69394
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- Apr 17, 2009
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Bob Wilson authored
llvm-svn: 69382
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Bob Wilson authored
llvm-svn: 69381
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Bob Wilson authored
punctuation. No functional changes. llvm-svn: 69378
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Bob Wilson authored
for ARM. Patch by Sandeep Patel. llvm-svn: 69371
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Rafael Espindola authored
leaq foo@TLSGD(%rip), %rdi as part of the instruction sequence. Using a register other than %rdi and then copying it to %rdi is not valid. llvm-svn: 69350
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Bill Wendling authored
llvm-svn: 69347
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Dan Gohman authored
matter, because this instruction isn't generated until after things that care. llvm-svn: 69336
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Dan Gohman authored
present, but it's inconsistent. llvm-svn: 69335
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Chris Lattner authored
this fixes a crash on CodeGen/Generic/externally_available.ll on ppc hosts. Thanks to Nicholas L for pointing this out. llvm-svn: 69333
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- Apr 16, 2009
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Rafael Espindola authored
llvm-svn: 69284
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- Apr 15, 2009
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Dan Gohman authored
llvm-svn: 69204
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