operands. We don't currently have a hook to provide "the largest super class of
A where all registers' getSubReg(subidx) is valid and in B".

llvm-svn: 110730

llvm-svn: 110726

The live interval may be used for a spill slot as well, and that spill slot
could be shared by split registers. We cannot shrink it, even if we know the
current register won't need the spill slot in that range.

llvm-svn: 110721

llvm-svn: 110720

ARM testers.

llvm-svn: 110718

llvm-svn: 110717

llvm-svn: 110714

llvm-svn: 110712

llvm-svn: 110710

Re-apply r110655 with fixes. Epilogue must restore sp from fp if the function stack frame has a var-sized object.

Also added a test case to check for the added benefit of this patch: it's optimizing away the unnecessary restore of sp from fp for some non-leaf functions.

llvm-svn: 110707

When splitting a live range, the new registers have fewer uses and the
permissible register class may be less constrained. Recompute the register class
constraint from the uses of new registers created for a split. This may let them
be allocated from a larger set, possibly avoiding a spill.

llvm-svn: 110703

register is", it breaks a couple test-suite tests.

llvm-svn: 110701

parentheses from argument lists.

llvm-svn: 110692

during live range splitting.

llvm-svn: 110686

This reverts commit 110575.

Target.isAbsolute() is true if SD would be null.

llvm-svn: 110683

llvm-svn: 110667

llvm-svn: 110665

llvm-svn: 110656

reserved, not available for general allocation. This eliminates all the
extra checks for Darwin.

This change also fixes the use of FP to access frame indices in leaf
functions and cleaned up some confusing code in epilogue emission.

llvm-svn: 110655

llvm-svn: 110654

llvm-svn: 110653

llvm-svn: 110652

llvm-svn: 110650

llvm-svn: 110649

llvm-svn: 110648

llvm-svn: 110645

Refactor and simplify code to avoid redundant checks.

llvm-svn: 110642

is the default.  Patch by NAKAMURA Takumi!

llvm-svn: 110636

llvm-svn: 110633

register at a time. This turns out to be slightly faster than iterating over
instructions, but more importantly, it allows us to compute spill weights for
new registers created after the spill weight pass has run.

Also compute the allocation hint at the same time as the spill weight. This
allows us to use the spill weight as a cost metric for copies, and choose the
most profitable hint if there is more than one possibility.

The new hints provide a very small (< 0.1%) but universal code size improvement.

llvm-svn: 110631

llvm-svn: 110630

pass. This pass should expand with all of the small, fine-grained optimization
passes to reduce compile time and increase happiment.

llvm-svn: 110627

llvm-svn: 110623

llvm-svn: 110621

llvm-svn: 110618

previously collected info from the .file directives and outputs the encoded
bytes for it.  For now this is only in the Mach-O streamer but at some point
will move to a more generic place.

llvm-svn: 110617

This will always be false before PEI:
(DisableFramePointerElim(MF) && MFI->adjustsStack())
Which means it's going to make r11 available as a general purpose register even
if -disable-fp-elim is specified. It's working on Darwin only because r7 is
always reserved. But it's obviously broken for other targets.

llvm-svn: 110614

Add VCVTPD2PS, VCVTPS2DQ, VCVTPS2PDY, VCVTTPD2DQY, VCVTTPS2DQ and VCVTPD2DQ 256-bit conversion intrinsics

llvm-svn: 110608

llvm-svn: 110607

Add patterns to AVX conversions instructions. Do that instead of declaring more intructions whenever is possible, more coming

llvm-svn: 110605