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  1. Jan 05, 2014
  2. Jan 04, 2014
  3. Jan 03, 2014
  4. Jan 02, 2014
  5. Jan 01, 2014
  6. Dec 31, 2013
  7. Dec 30, 2013
  8. Dec 29, 2013
    • Alp Toker's avatar
      Python compatibility fix for r198150 · e395023e
      Alp Toker authored
      Remove the stat call error reporting for now.
      
      It wasn't essential so silent fallback should be fine here.
      
      llvm-svn: 198155
      e395023e
    • Alp Toker's avatar
      Prospective Python 3 fix for r198150 · 0324ee0a
      Alp Toker authored
      llvm-svn: 198152
      0324ee0a
    • Alp Toker's avatar
      lit: Incremental test scheduling · fdef0e0d
      Alp Toker authored
      Add option -i to prioritize test runs by source file modification time and
      previous failure state.
      
      This optimal scheduling reduces typical test-and-fix iteration times to a
      matter of seconds by rapidly answering the questions:
      
        1) Did my recent change fix tests that were previously failing?
        2) Do the tests I just wrote / modified still work?
      
      The current implementation requires write permissions to the source tree
      because it uses mtimes to track failures.
      
      llvm-svn: 198150
      fdef0e0d
  9. Dec 25, 2013
  10. Dec 20, 2013
  11. Dec 19, 2013
    • Hal Finkel's avatar
      Add support for positionally-encoded operands to FixedLenDecoderEmitter · 71b2e20d
      Hal Finkel authored
      Unfortunately, the PowerPC instruction definitions make heavy use of the
      positional operand encoding heuristic to map operands onto bitfield variables
      in the instruction definitions. Changing this to use name-based mapping is not
      trivial, however, because additional infrastructure needs to be designed to
      handle mapping of complex operands (with multiple suboperands) onto multiple
      bitfield variables.
      
      In the mean time, this adds support for positionally encoded operands to
      FixedLenDecoderEmitter, so that we can generate a disassembler for the PowerPC
      backend. To prevent an accidental reliance on this feature, and to prevent an
      undesirable interaction with existing disassemblers, a backend must opt-in to
      this support by setting the new decodePositionallyEncodedOperands
      instruction-set bit to true.
      
      When enabled, this iterates the variables that contribute to the instruction
      encoding, just as the encoder does, and emulates the procedure the encoder uses
      to map "numbered" operands to variables. The bit range for each variable is
      also determined as the encoder determines them. This map is then consulted
      during the decoder-generator's loop over operands to decode, allowing the
      decoder to understand both position-based and name-based operand-to-variable
      mappings.
      
      As noted in the comment on the decodePositionallyEncodedOperands definition,
      this support should be removed once it is no longer needed. There should be no
      change to existing disassemblers.
      
      llvm-svn: 197691
      71b2e20d
    • Hal Finkel's avatar
      Add support for PointerLikeRegClass to FixedLenDecoderEmitter · 9d95e8d5
      Hal Finkel authored
      This is more prep for adding the PowerPC disassembler. FixedLenDecoderEmitter
      should recognize PointerLikeRegClass operands as register types, and generate
      register-like decoding calls instead of treating them like immediates.
      
      llvm-svn: 197680
      9d95e8d5
  12. Dec 17, 2013
    • Hal Finkel's avatar
      Support little-endian encodings in the FixedLenDecoderEmitter · 81e6fccb
      Hal Finkel authored
      The convention used to specify the PowerPC ISA is that bits are numbered in
      reverse order (0 is the index of the high bit). To support this "little endian"
      encoding convention, CodeEmitterGen will reverse the bit numberings prior to
      generating the encoding tables. In order to generate a disassembler,
      FixedLenDecoderEmitter needs to do the same.
      
      This moves the bit reversal logic out of CodeEmitterGen and into CodeGenTarget
      (where it can be used by both CodeEmitterGen and FixedLenDecoderEmitter). This
      is prep work for disassembly support in the PPC backend (which is the only
      in-tree user of this little-endian encoding support).
      
      llvm-svn: 197532
      81e6fccb
    • NAKAMURA Takumi's avatar
      Tweak lit/TestingConfig.py Py3-compatible. has_key is dead. · b7bf04c0
      NAKAMURA Takumi authored
      llvm-svn: 197462
      b7bf04c0
    • Reid Kleckner's avatar
      Add missing trailing comma in llvm-lit.in · 341a142b
      Reid Kleckner authored
      I was testing a stale bin/llvm-lit, which now lives at bin/llvm-lit.py
      on Windows.
      
      llvm-svn: 197446
      341a142b
    • Reid Kleckner's avatar
      Add the lit site config for unittests to bin/llvm-lit · 8dcf9854
      Reid Kleckner authored
      This missing parameter was causing bin/llvm-lit to run the unittests
      from my primary build directory instead of my self-hosting build
      directory because llvm-config was on my PATH.
      
      This more closely matches what 'make check' will pass to lit.py.
      
      llvm-svn: 197444
      8dcf9854
  13. Dec 16, 2013
  14. Dec 12, 2013
  15. Dec 05, 2013
    • Alp Toker's avatar
      Correct word hyphenations · f907b891
      Alp Toker authored
      This patch tries to avoid unrelated changes other than fixing a few
      hyphen-related ambiguities and contractions in nearby lines.
      
      llvm-svn: 196471
      f907b891
  16. Dec 04, 2013
  17. Dec 03, 2013
  18. Dec 02, 2013
  19. Nov 24, 2013
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