llvm-svn: 130947

llvm-svn: 130944

BuildSchedGraph was quadratic in the number of calls in the basic
block. After this fix, it keeps only a single call at the top of the
DefList so compile time doesn't blow up on large blocks. This reduces
postRA sched time on an external test case from 81s to 0.3s.  Although
r130800 (reduced ARM register alias defs) also partially fixes the
issue by reducing the constant overhead of checking call interference
by an order of magnitude.

Fixes <rdar://problem/7662664> very poor compile time with post RA scheduling.

llvm-svn: 130943

llvm-svn: 130942

I tested both gdb on a bootstrapped clang and and the gdb testsuite on OS X (snow leopard)
and both are happy using __eh_frame.

llvm-svn: 130937

llvm-svn: 130934

llvm-svn: 130933

No test because I can't think of any way to write one that won't break quickly.

llvm-svn: 130932

llvm-svn: 130931

Avoid extra vreg copies for arguments passed in registers.  Specifically, this can make MachineCSE more effective in some cases (especially in small functions).  PR8361 / part of rdar://problem/8259436 .

llvm-svn: 130928

llvm-svn: 130926

llvm-svn: 130925

llvm-svn: 130920

who used this flag, and it now emits CFI and doesn't emit this anymore. All
other targets left this flag "false".
<rdar://problem/8486371>

llvm-svn: 130918

crash.

llvm-svn: 130911

llvm-svn: 130903

filename.

llvm-svn: 130897

Joining physregs is inherently dangerous because it uses a heuristic to avoid
creating invalid code. Linear scan had an emergency spilling mechanism to deal
with those rare cases. The new greedy allocator does not.

The greedy register allocator is much better at taking hints, so this has almost
no impact on code size and quality. The few cases where it matters show up as
unit tests that now have -join-physregs enabled explicitly.

llvm-svn: 130896

llvm-svn: 130895

llvm-svn: 130894

It is OK for B to be any GR8_ABCD_H superclass, the returned register class
doesn't have to map surjectively onto B.

llvm-svn: 130892

landing pad as its successor.

SjLj exception handling jumps to the correct landing pad via a switch statement
that's generated right before code-gen. Loosen the constraint in the machine
instruction verifier to allow for this. Note, this isn't the most rigorous check
since we cannot determine where that switch statement came from. But it's
marginally better than turning this check off when SjLj exceptions are used.
<rdar://problem/9187612>

llvm-svn: 130881

llvm-svn: 130880

Original message:

Teach MachineCSE how to do simple cross-block CSE involving physregs.  This allows, for example, eliminating duplicate cmpl's on x86. Part of rdar://problem/8259436 .

llvm-svn: 130877

llvm-svn: 130876

llvm-svn: 130869

llvm-svn: 130867

Teach MachineCSE how to do simple cross-block CSE involving physregs.  This allows, for example, eliminating duplicate cmpl's on x86. Part of rdar://problem/8259436 .

llvm-svn: 130862

llvm-svn: 130857

llvm-svn: 130854

llvm-svn: 130850

Prevent instructions using $gp from being placed between a jalr and the instruction that restores the clobbered $gp.

llvm-svn: 130847

it is both inefficient and unexpected by dwarfdump. Change to
a DW_FORM_data4.

While in here, change the predicate name to reflect that the position
is not really absolute (it is an offset), just that the linker needs a
relocation.

llvm-svn: 130846

Physreg joining is still on by default, but I will turn it off shortly.

llvm-svn: 130844

Tighten up check for empty (i.e. no meaningful debug info) module. This fixes dwarf-die2.c test case from gcc test suite.

llvm-svn: 130842

but according to my super-optimizer there are only two missed simplifications
of -instsimplify kind when compiling bzip2, and this is one of them.  It amuses
me to have bzip2 be perfectly optimized as far as instsimplify goes!

llvm-svn: 130840

frontend, if applicable.

llvm-svn: 130835

This adds functionality to remove size/zero extension during indvars
without generating a canonical IV and rewriting all IV users. It's
disabled by default so should have no effect on codegen. Work in progress.

llvm-svn: 130829

coalescing.

llvm-svn: 130814

LiveVariables doesn't understand that clobbering D0 and D1 completely overwrites
Q0, so if Q0 is live-in to a function, its live range will extend beyond a
function call that only clobbers D0 and D1. This shows up in the
ARM/2009-11-01-NeonMoves test case.

LiveVariables should probably implement the much stricter rules for physreg
liveness that RAFast imposes - a physreg is killed by the first use of any
alias.

llvm-svn: 130801