llvm-svn: 192125

of loops.

Previously, two consecutive calls to function "func" would result in the
following sequence of instructions:

1. load $16, %got(func)($gp) // load address of lazy-binding stub.
2. move $25, $16
3. jalr $25                  // jump to lazy-binding stub.
4. nop
5. move $25, $16
6. jalr $25                  // jump to lazy-binding stub again.

With this patch, the second call directly jumps to func's address, bypassing
the lazy-binding resolution routine:

1. load $25, %got(func)($gp) // load address of lazy-binding stub.
2. jalr $25                  // jump to lazy-binding stub.
3. nop
4. load $25, %got(func)($gp) // load resolved address of func.
5. jalr $25                  // directly jump to func.

llvm-svn: 191591

Use SmallVectorImpl::iterator/const_iterator instead of SmallVector to avoid specifying the vector size.

llvm-svn: 185540

the internals of TargetMachine could change.

llvm-svn: 183493

llvm-svn: 177899

llvm-svn: 176330

successor basic blocks.

Currently this is off by default.

llvm-svn: 176329

llvm-svn: 176321

can fill the delay slot.

Currently, this is off by default.

llvm-svn: 176320

No functionality change.

llvm-svn: 176318

llvm-svn: 176317

This class tracks dependence between memory instructions using underlying
objects of memory operands. 

llvm-svn: 176313

No functionality change.

llvm-svn: 176070

Unfortunately, I wasn't able to create a test case that demonstrates the
problem I was trying to fix with this patch.

llvm-svn: 175226

defined and used registers. Also add a few helper functions to simplify the
code. 

llvm-svn: 175224

llvm-svn: 175222

1. Define and use function terminateSearch.
2. Use MachineBasicBlock::iterator instead of MachineBasicBlock::instr_iterator.
3. Delete the line which checks whether an instruction is a pseudo. 

llvm-svn: 175219

llvm-svn: 174666

This is the preferred way of creating bundled machine instructions.

llvm-svn: 169585

Sooooo many of these had incorrect or strange main module includes.
I have manually inspected all of these, and fixed the main module
include to be the nearest plausible thing I could find. If you own or
care about any of these source files, I encourage you to take some time
and check that these edits were sensible. I can't have broken anything
(I strictly added headers, and reordered them, never removed), but they
may not be the headers you'd really like to identify as containing the
API being implemented.

Many forward declarations and missing includes were added to a header
files to allow them to parse cleanly when included first. The main
module rule does in fact have its merits. =]

llvm-svn: 169131

allowed in branch delay slot.

llvm-svn: 168131

llvm-svn: 162589

default.

Patch by Carl Norum.

llvm-svn: 162339

llvm-svn: 158471

delay slot filler pass of MIPS, per suggestion of Jakob Stoklund Olesen.

This change, along with the fix in r158154, enables machine verification
to be run after delay slot filling.

llvm-svn: 158426

MCRegAliasIterator can optionally visit the register itself, allowing
for simpler code.

llvm-svn: 157837

The purpose of this option is to silence error messages issued by machine
verifier passes and enable them to run to the end. If this option is not
provided, -verify-machineinstrs complains when it discovers there is a
non-terminator instruction (an instruction that is in a delay slot) after the
first terminator in a basic block.

llvm-svn: 156790

llvm-svn: 152001

llvm-svn: 151625

llvm-svn: 150805

llvm-svn: 150775

llvm-svn: 146896

generator to it. For non-bundle instructions, these behave exactly the same
as the MC layer API.

For properties like mayLoad / mayStore, look into the bundle and if any of the
bundled instructions has the property it would return true.
For properties like isPredicable, only return true if *all* of the bundled
instructions have the property.
For properties like canFoldAsLoad, isCompare, conservatively return false for
bundles.

llvm-svn: 146026

llvm-svn: 141197

llvm-svn: 141196

llvm-svn: 141194

llvm-svn: 141174

llvm-svn: 141158

llvm-svn: 141157

llvm-svn: 141156