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  1. Mar 13, 2013
  2. Jan 02, 2013
    • Chandler Carruth's avatar
      Move all of the header files which are involved in modelling the LLVM IR · 9fb823bb
      Chandler Carruth authored
      into their new header subdirectory: include/llvm/IR. This matches the
      directory structure of lib, and begins to correct a long standing point
      of file layout clutter in LLVM.
      
      There are still more header files to move here, but I wanted to handle
      them in separate commits to make tracking what files make sense at each
      layer easier.
      
      The only really questionable files here are the target intrinsic
      tablegen files. But that's a battle I'd rather not fight today.
      
      I've updated both CMake and Makefile build systems (I think, and my
      tests think, but I may have missed something).
      
      I've also re-sorted the includes throughout the project. I'll be
      committing updates to Clang, DragonEgg, and Polly momentarily.
      
      llvm-svn: 171366
      9fb823bb
  3. Dec 03, 2012
    • Chandler Carruth's avatar
      Use the new script to sort the includes of every file under lib. · ed0881b2
      Chandler Carruth authored
      Sooooo many of these had incorrect or strange main module includes.
      I have manually inspected all of these, and fixed the main module
      include to be the nearest plausible thing I could find. If you own or
      care about any of these source files, I encourage you to take some time
      and check that these edits were sensible. I can't have broken anything
      (I strictly added headers, and reordered them, never removed), but they
      may not be the headers you'd really like to identify as containing the
      API being implemented.
      
      Many forward declarations and missing includes were added to a header
      files to allow them to parse cleanly when included first. The main
      module rule does in fact have its merits. =]
      
      llvm-svn: 169131
      ed0881b2
  4. Jun 23, 2012
  5. Apr 08, 2012
    • Chandler Carruth's avatar
      Teach LLVM about a PIE option which, when enabled on top of PIC, makes · ede4a8aa
      Chandler Carruth authored
      optimizations which are valid for position independent code being linked
      into a single executable, but not for such code being linked into
      a shared library.
      
      I discussed the design of this with Eric Christopher, and the decision
      was to support an optional bit rather than a completely separate
      relocation model. Fundamentally, this is still PIC relocation, its just
      that certain optimizations are only valid under a PIC relocation model
      when the resulting code won't be in a shared library. The simplest path
      to here is to expose a single bit option in the TargetOptions. If folks
      have different/better designs, I'm all ears. =]
      
      I've included the first optimization based upon this: changing TLS
      models to the *Exec models when PIE is enabled. This is the LLVM
      component of PR12380 and is all of the hard work.
      
      llvm-svn: 154294
      ede4a8aa
    • Chandler Carruth's avatar
      Move the TLSModel information into the TargetMachine rather than hiding · 16f0ebcb
      Chandler Carruth authored
      in TargetLowering. There was already a FIXME about this location being
      odd. The interface is simplified as a consequence. This will also make
      it easier to change TLS models when compiling with PIE.
      
      llvm-svn: 154292
      16f0ebcb
  6. Mar 26, 2012
  7. Mar 25, 2012
  8. Feb 10, 2012
    • Andrew Trick's avatar
      RegAlloc superpass: includes phi elimination, coalescing, and scheduling. · d3f8fe81
      Andrew Trick authored
      Creates a configurable regalloc pipeline.
      
      Ensure specific llc options do what they say and nothing more: -reglloc=... has no effect other than selecting the allocator pass itself. This patch introduces a new umbrella flag, "-optimize-regalloc", to enable/disable the optimizing regalloc "superpass". This allows for example testing coalscing and scheduling under -O0 or vice-versa.
      
      When a CodeGen pass requires the MachineFunction to have a particular property, we need to explicitly define that property so it can be directly queried rather than naming a specific Pass. For example, to check for SSA, use MRI->isSSA, not addRequired<PHIElimination>.
      
      CodeGen transformation passes are never "required" as an analysis
      
      ProcessImplicitDefs does not require LiveVariables.
      
      We have a plan to massively simplify some of the early passes within the regalloc superpass.
      
      llvm-svn: 150226
      d3f8fe81
  9. Jan 17, 2012
  10. Jan 13, 2012
  11. Dec 11, 2011
  12. Dec 10, 2011
  13. Dec 02, 2011
    • Nick Lewycky's avatar
      Move global variables in TargetMachine into new TargetOptions class. As an API · 50f02cb2
      Nick Lewycky authored
      change, now you need a TargetOptions object to create a TargetMachine. Clang
      patch to follow.
      
      One small functionality change in PTX. PTX had commented out the machine
      verifier parts in their copy of printAndVerify. That now calls the version in
      LLVMTargetMachine. Users of PTX who need verification disabled should rely on
      not passing the command-line flag to enable it.
      
      llvm-svn: 145714
      50f02cb2
  14. Nov 16, 2011
  15. Oct 31, 2011
  16. Oct 18, 2011
    • Nick Lewycky's avatar
      Add support for a new extension to the .file directive: · 40f8f2ff
      Nick Lewycky authored
        .file filenumber "directory" "filename"
      
      This removes one join+split of the directory+filename in MC internals. Because
      bitcode files have independent fields for directory and filenames in debug info,
      this patch may change the .o files written by existing .bc files.
      
      llvm-svn: 142300
      40f8f2ff
  17. Aug 30, 2011
  18. Jul 20, 2011
  19. Jul 19, 2011
  20. Jul 08, 2011
    • Evan Cheng's avatar
      Eliminate asm parser's dependency on TargetMachine: · 4d1ca96b
      Evan Cheng authored
      - Each target asm parser now creates its own MCSubtatgetInfo (if needed).
      - Changed AssemblerPredicate to take subtarget features which tablegen uses
        to generate asm matcher subtarget feature queries. e.g.
        "ModeThumb,FeatureThumb2" is translated to
        "(Bits & ModeThumb) != 0 && (Bits & FeatureThumb2) != 0".
      
      llvm-svn: 134678
      4d1ca96b
  21. Jun 23, 2011
  22. May 25, 2011
  23. Apr 30, 2011
  24. Apr 21, 2011
  25. Apr 08, 2011
  26. Apr 07, 2011
  27. Mar 29, 2011
  28. Jan 23, 2011
  29. Nov 19, 2010
    • Rafael Espindola's avatar
      Change some methods in MCDwarf.cpp to be able to handle an arbitrary · b58867cc
      Rafael Espindola authored
      MCStreamer instead of just MCObjectStreamer. Address changes cannot
      be as efficient as we have to use DW_LNE_set_addres, but at least
      most of the logic is shared.
      
      This will be used so that, with CodeGen still using EmitDwarfLocDirective,
      llvm-gcc is able to produce debug_line sections without needing an
      assembler that supports .loc.
      
      llvm-svn: 119777
      b58867cc
  30. Jul 16, 2010
    • Evan Cheng's avatar
      Split -enable-finite-only-fp-math to two options: · 55f0c6b9
      Evan Cheng authored
      -enable-no-nans-fp-math and -enable-no-infs-fp-math. All of the current codegen fp math optimizations only care whether the fp arithmetics arguments and results can never be NaN.
      
      llvm-svn: 108465
      55f0c6b9
  31. Jul 13, 2010
  32. May 26, 2010
  33. May 18, 2010
  34. May 14, 2010
  35. May 02, 2010
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