Commits · 5cd044e8c84f8424cbbaa4b4e82b5c473f9bc120 · Roger Ferrer / llvm-epi-0.8 · GitLab

This project is archived. Its data is read-only.

Nov 07, 2017
- Use new vector insert half-word and byte instructions when we see... · 5cd044e8
  Graham Yiu authored Nov 07, 2017
  5cd044e8
- Reland "Correct dwarf unwind information in function epilogue for X86" · e2a585dd
  Petar Jovanovic authored Nov 07, 2017
  e2a585dd
- [X86] Regenerate select tests · 9a6b720f
  Simon Pilgrim authored Nov 07, 2017
  9a6b720f
- [GlobalISel] Enable legalizing non-power-of-2 sized types. · af9814a1
  Kristof Beyls authored Nov 07, 2017
  af9814a1
- [X86] Don't clobber reserved registers with stack adjustments · c02b237e
  Bjorn Steinbrink authored Nov 07, 2017
  c02b237e
- [X86] Add patterns to fold a 64-bit load into the EVEX vcvtph2ps instructions. · e7fb3002
  Craig Topper authored Nov 07, 2017
  e7fb3002
- [X86] Add patterns for folding a v16i8 with the VEX vcvtph2ps intrinsics. · 0231b1d4
  Craig Topper authored Nov 07, 2017
  0231b1d4
- [X86] Add a test for a 128-bit vector load feeding a cvtph2ps intrinsic. · 65fc5332
  Craig Topper authored Nov 07, 2017
  65fc5332
- [X86] Remove alignment from a load in the f16c intrinsic test. The alignment... · 8942b33f
  Craig Topper authored Nov 07, 2017
  8942b33f
- [X86] Add support for using EVEX instructions for the legacy vcvtph2ps intrinsics. · cf8e6d0a
  Craig Topper authored Nov 07, 2017
  cf8e6d0a
- [X86] Add AVX512VL command line to f16c intrinsic test to show missed EVEX... · 75510dd6
  Craig Topper authored Nov 07, 2017
  75510dd6
- [X86] Use IMPLICIT_DEF in VEX/EVEX vcvtss2sd/vcvtsd2ss patterns instead of a COPY_TO_REGCLASS. · afc3c820
  Craig Topper authored Nov 07, 2017
  afc3c820
Nov 06, 2017
- [X86] Make FeatureAVX512 imply FeatureF16C. · 428a4e63
  Craig Topper authored Nov 06, 2017
  428a4e63
- [MIRPrinter] Use %subreg.xxx syntax for subregister index operands · a42ed3e3
  Bjorn Pettersson authored Nov 06, 2017
  a42ed3e3
- Adds code to PPC ISEL lowering to recognize byte inserts from vector_shuffles,... · 030621bb
  Graham Yiu authored Nov 06, 2017
  030621bb
- [PPC] Use xxbrd to speed up bswap64 · e3b8d9a3
  Guozhi Wei authored Nov 06, 2017
  e3b8d9a3
- AMDGPU: Select v_mad_u64_u32 and v_mad_i64_i32 · 4f6318fe
  Matt Arsenault authored Nov 06, 2017
  4f6318fe
- [AMDGPU] Change alloca addr space of r600 to 5 for amdgiz environment · cc56a8b1
  Yaxun Liu authored Nov 06, 2017
  cc56a8b1
- [AMDGPU] Fix assertion due to assuming pointer in default addr space is 32 bit · 1ac16619
  Yaxun Liu authored Nov 06, 2017
  1ac16619
- [X86][AVX512] Improve lowering of AVX512 test intrinsics · bb86686a
  Uriel Korach authored Nov 06, 2017
  bb86686a
- X86 ISel: Basic support for variable-index vector permutations · 31226980
  Zvi Rackover authored Nov 06, 2017
  31226980
- [x86][AVX512] Lowering Broadcastm intrinsics to LLVM IR · 7b705f1f
  Jina Nahias authored Nov 06, 2017
  7b705f1f
- [X86] Use EVEX encoded intrinsics for legacy FMA intrinsics when possible. · 70eaeae7
  Craig Topper authored Nov 06, 2017
  70eaeae7
- [X86] Add avx512vl command line to fma-instrinsics-x86.ll · 25cfa4cb
  Craig Topper authored Nov 06, 2017
  25cfa4cb
- [X86] Simplify command lines on the fma-instrinsics-x86.ll test and add -show-mc-encoding. · 7e48aa89
  Craig Topper authored Nov 06, 2017
  7e48aa89
- [X86] Use EVEX encoded instructions for legacy scalar sqrt intrinsics. · eff606cc
  Craig Topper authored Nov 06, 2017
  eff606cc
Nov 05, 2017
- [X86] Remove some more RCP and RSQRT patterns from InstrAVX512.td that I missed in r317413. · 4e2f5351
  Craig Topper authored Nov 05, 2017
  4e2f5351
- [X86][SSE] Tests for integer min/max horizontal reductions · 879c5b15
  Simon Pilgrim authored Nov 05, 2017
  879c5b15
Nov 04, 2017
- [X86][AVX] Regenerate test. NFCI. · f8105cf3
  Simon Pilgrim authored Nov 04, 2017
  f8105cf3
- [X86] Don't use RCP14 and RSQRT14 for reciprocal estimations or for legacy SSE... · 692c8efe
  Craig Topper authored Nov 04, 2017
  692c8efe
- [X86] Regenerate a couple more tests that I missed in r317410. · be1f2190
  Craig Topper authored Nov 04, 2017
  be1f2190
- [X86] Teach EVEX->VEX pass to turn SHUFI32X4/SHUFF32X4/SHUFI64X/SHUFF64X2 into... · e5d44cef
  Craig Topper authored Nov 04, 2017
  e5d44cef
- [AMDGPU] Remove hardcoded address space value from AMDGPULibFunc · 0d9673cf
  Yaxun Liu authored Nov 04, 2017
  0d9673cf
- [X86] Teach shuffle lowering to use 256-bit SHUF128 when possible. · a96d62b3
  Craig Topper authored Nov 04, 2017
  a96d62b3
Nov 03, 2017
- [X86] Give unary PERMI priority over SHUF128 in lowerV8I64VectorShuffle to... · d21a53f2
  Craig Topper authored Nov 03, 2017
  d21a53f2
- [AArch64] Fix the number of iterations for the Newton series · 9dcf0999
  Evandro Menezes authored Nov 03, 2017
  9dcf0999
- [LICM] sink through non-trivially replicable PHI · f5fb3d74
  Jun Bum Lim authored Nov 03, 2017
  f5fb3d74
- [mips] Match 'ins' and its' variants with C++ code · d3b9f61c
  Simon Dardis authored Nov 03, 2017
  d3b9f61c
- Fix for Bug 34475 - LOCK/REP/REPNE prefixes emitted as instruction on their own. · 0916c6b6
  Andrew V. Tischenko authored Nov 03, 2017
  0916c6b6
- re-land [ExpandMemCmp] Split ExpandMemCmp from CodeGen into its own pass." · 063bed9b
  Clement Courbet authored Nov 03, 2017
  063bed9b