- Jul 08, 2010
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Bruno Cardoso Lopes authored
llvm-svn: 107823
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Evan Cheng authored
llvm-svn: 107820
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- Jul 07, 2010
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Devang Patel authored
llvm-svn: 107818
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Jim Grosbach authored
llvm-svn: 107811
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Jakob Stoklund Olesen authored
This fixes PR7540. llvm-svn: 107809
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Dan Gohman authored
a separate DCE pass over MachineInstrs. llvm-svn: 107804
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Dan Gohman authored
a bunch of stuff, to allow the target-independent calling convention logic to be employed. llvm-svn: 107800
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Bruno Cardoso Lopes authored
llvm-svn: 107798
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Dan Gohman authored
around everywhere, and also give it an InsertPt member, to enable isel to operate at an arbitrary position within a block, rather than just appending to a block. llvm-svn: 107791
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Dan Gohman authored
instance, rather than pointers to all of FunctionLoweringInfo's members. This eliminates an NDEBUG ABI sensitivity. llvm-svn: 107789
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Dan Gohman authored
code can do calling-convention queries. This obviates OutputArgReg. llvm-svn: 107786
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Bruno Cardoso Lopes authored
llvm-svn: 107752
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Bruno Cardoso Lopes authored
llvm-svn: 107750
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Bruno Cardoso Lopes authored
Now that almost all SSE4.1 AVX instructions are added, move code around to more appropriate sections. No functionality changes llvm-svn: 107749
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Bruno Cardoso Lopes authored
llvm-svn: 107747
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Bruno Cardoso Lopes authored
llvm-svn: 107746
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Bob Wilson authored
llvm-svn: 107743
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Jim Grosbach authored
they've been tested to work. llvm-svn: 107742
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Bruno Cardoso Lopes authored
llvm-svn: 107740
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Jim Grosbach authored
than assuming a target will custom lower them. Targets which do so should exlicitly mark them as having custom lowerings. PR7454. llvm-svn: 107734
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Bob Wilson authored
allocated to consecutive registers. llvm-svn: 107730
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Dale Johannesen authored
print the (%rip) only if the 'a' modifier is present. PR 7528. llvm-svn: 107727
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Jakob Stoklund Olesen authored
This means that an instruction defining an S register will affect the domain of the parent D register. llvm-svn: 107725
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Bruno Cardoso Lopes authored
llvm-svn: 107723
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Bruno Cardoso Lopes authored
llvm-svn: 107720
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Bruno Cardoso Lopes authored
llvm-svn: 107717
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Bruno Cardoso Lopes authored
Update VEX encoding to support those new instructions llvm-svn: 107715
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Dan Gohman authored
SelectBasicBlock doesn't needs its BasicBlock argument. llvm-svn: 107712
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Devang Patel authored
llvm-svn: 107710
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- Jul 06, 2010
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Bob Wilson authored
llvm-svn: 107701
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Dan Gohman authored
the block before calling the expansion hook. And don't put EFLAGS in a mbb's live-in list twice. llvm-svn: 107691
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Devang Patel authored
llvm-svn: 107678
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Rafael Espindola authored
if profitable. llvm-svn: 107673
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Dan Gohman authored
llvm-svn: 107668
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Dan Gohman authored
from getPhysicalRegisterRegClass. llvm-svn: 107660
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Dan Gohman authored
the pseudo instruction is not at the end of the block. llvm-svn: 107655
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Eric Christopher authored
registers. Split out testcases per architecture and os now. Patch from Nelson Elhage. llvm-svn: 107640
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- Jul 05, 2010
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Eric Christopher authored
llvm-svn: 107625
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Kalle Raiskila authored
llvm-svn: 107622
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Chris Lattner authored
llvm-svn: 107615
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