- Sep 03, 2009
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Chris Lattner authored
olden programs working. llvm-svn: 80881
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Evan Cheng authored
X86JITInfo::getLazyResolverFunction() should not read cpu id to determine whether sse is available. Just use consult subtarget. No functionality changes. llvm-svn: 80880
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Chris Lattner authored
llvm-svn: 80874
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Sean Callanan authored
instruction tables to support segmented addressing (and other objects of obscure type). Modified the X86 assembly printers to handle these new operand types. Added JMP and CALL instructions that use segmented addresses. llvm-svn: 80857
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- Sep 02, 2009
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Anton Korobeynikov authored
llvm-svn: 80838
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Chris Lattner authored
llvm-svn: 80807
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Chris Lattner authored
llvm-svn: 80806
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Sandeep Patel authored
llvm-svn: 80773
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Chris Lattner authored
llvm-svn: 80764
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Chris Lattner authored
conditional moves as a subtarget feature. This is the easy part of PR4841. llvm-svn: 80763
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Sean Callanan authored
Added a 64-bit ADD %RAX, imm32 instruction. Added all 4 forms for AND %rAX, imm and CMP %rAX, imm. llvm-svn: 80746
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Daniel Dunbar authored
llvm-svn: 80729
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Daniel Dunbar authored
- Bruno, please check!! llvm-svn: 80728
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Daniel Dunbar authored
llvm-svn: 80727
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Daniel Dunbar authored
Remove Offset from ExternalSybmol MachineOperands, this is unused (and at least partly unsupported, in X86 encoding at least). llvm-svn: 80726
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- Sep 01, 2009
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Jim Grosbach authored
llvm-svn: 80710
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Bob Wilson authored
llvm-svn: 80707
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Jim Grosbach authored
llvm-svn: 80704
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David Goodwin authored
llvm-svn: 80699
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Sean Callanan authored
Added TEST %rAX, $imm instructions to the Intel tables. These are required for the X86 disassembler. llvm-svn: 80696
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Bruno Cardoso Lopes authored
Add MO flags to simplify the printing of relocations. Remove the support for printing large code model relocs (which aren't supported anyway). llvm-svn: 80691
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Sanjiv Gupta authored
llvm-svn: 80670
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Bob Wilson authored
llvm-svn: 80656
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Jim Grosbach authored
llvm-svn: 80650
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Jim Grosbach authored
makes an eggregious hack somewhat more palatable. Bringing the LSDA forward and making it a GV available for reference would be even better, but is beyond the scope of what I'm looking to solve at this point. Objective C++ code could generate function names that broke the previous scheme. This fixes that. llvm-svn: 80649
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- Aug 31, 2009
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Evan Cheng authored
llvm-svn: 80615
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Daniel Dunbar authored
- Down to 7 failures on 403.gcc. llvm-svn: 80605
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Daniel Dunbar authored
Stop printing old asm printing code inline with -experimental-asm-printer (this allows diffing and assembling the .s) llvm-svn: 80604
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Daniel Dunbar authored
llvm-svn: 80603
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Devang Patel authored
llvm-svn: 80602
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Duncan Sands authored
handling on x86-32 linux. llvm-svn: 80592
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Benjamin Kramer authored
llvm-svn: 80584
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Daniel Dunbar authored
Also, use MCInst::print instead of custom code in MCAsmPrinter. llvm-svn: 80575
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- Aug 30, 2009
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Anton Korobeynikov authored
llvm-svn: 80502
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Anton Korobeynikov authored
Remove the assertion and generalize the code for ARM NEON stuff. llvm-svn: 80498
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Daniel Dunbar authored
llvm-svn: 80485
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Dan Gohman authored
a register to 0. This fixes PR4814. llvm-svn: 80445
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- Aug 29, 2009
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Bill Wendling authored
encodings. - Make some of the values emitted by the FDEs dependent upon the pointer size. This is in line with how GCC does things. And it has the benefit of working for Darwin in 64-bit mode now. llvm-svn: 80428
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Anton Korobeynikov authored
llvm-svn: 80409
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Anton Korobeynikov authored
llvm-svn: 80408
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