when we see a read of a register.  This is important in cases like:

AL = ...
AH = ...

   = AX

The read of AX must make both the AL and AH defs live until the use.

llvm-svn: 13444

llvm-svn: 13440

llvm-svn: 13439

syntactically loopify natural loops so that the GCC loop optimizer can find them.  This should *dramatically* improve the performance of CBE compiled code on targets that depend on GCC's loop optimizations (like PPC)

llvm-svn: 13438

llvm-svn: 13437

llvm-svn: 13436

FindUsedTypes manipulation stuff out to be a seperate pass, and make the
main CWriter be a function pass now!

llvm-svn: 13435

llvm-svn: 13433

llvm-svn: 13432

Print all PHI copies for successor blocks before the terminator, whether it be a conditional branch or switch.

llvm-svn: 13430

llvm-svn: 13429

llvm-svn: 13425

llvm-svn: 13424

Flesh out the SetCC support... which currently ends in a little bit
of unfinished code (which is probably completely hilarious) for
generating the condition value splitting the basic block up into 4
blocks, like this (clearly a better API is needed for this!):

       BB
   cond. branch
     /         /          R1=1    R2=0
     \      /
      \    /
    R=phi(R1,R2)

Other minor edits.

llvm-svn: 13423

llvm-svn: 13422

llvm-svn: 13421

llvm-svn: 13420

llvm-svn: 13419

Add support for branches (based loosely on X86/InstSelectSimple).
Add support for not visiting phi nodes in the first pass.
Add support for loading bools.
Flesh out support for stores.

llvm-svn: 13418

llvm-svn: 13417

llvm-svn: 13416

        %tmp.0 = getelementptr [50 x sbyte]* %ar, uint 0, int 5         ; <sbyte*> [#uses=2]
        %tmp.7 = getelementptr sbyte* %tmp.0, int 8             ; <sbyte*> [#uses=1]

together.  This patch actually allows us to simplify and generalize the code.

llvm-svn: 13415

Disable the code that copies long constants to registers - it looks fishy.
Implement some simple casts: integral, smaller than longs, and equal-width
 or narrowing only.

llvm-svn: 13413

allows us to compile:

store float 10.0, float* %P

into:
        mov DWORD PTR [%EAX], 1092616192

instead of:

.CPItest_0:                                     # float 0x4024000000000000
.long   1092616192      # float 10
...
        fld DWORD PTR [.CPItest_0]
        fstp DWORD PTR [%EAX]

llvm-svn: 13409

against zero.  In particular, don't emit:

        mov %ESI, 0
        cmp %ECX, %ESI

instead, emit:

       test %ECX, %ECX

llvm-svn: 13407

llvm-svn: 13400

llvm-svn: 13391

llvm-svn: 13388

When looking at getelementptr instructions, make sure to use a forwarded
type.  We want to do this because a DerivedType may drop its uses and then
refine its users, who may then use another user who hasn't been refined yet.
By getting the forwarded type, we always ensure that we're looking at a
Type that isn't in a halfway refined state.

Now, I should be able to put this stuff in PATypeHandle, but it doesn't work
for some reason.  This should do for now.

llvm-svn: 13386

workaround, use the C HUGE_VAL macro instead.

llvm-svn: 13377

the debugging functions that call "dot". These fixed settings have
various problems: for example, the fixed size that is set in the graph
traits classes is not appropriate for turning the dot file into a PNG,
and if TrueType font rendering is being used, the 'Courier' TrueType font
may not be installed. It seems easy enough to specify these things on the
command line, anyhow.

llvm-svn: 13366

llvm-svn: 13364

llvm-svn: 13363

llvm-svn: 13362

constant pool member's name.
This is intended to address Bug 333.

Also, fix an anachronistic usage of "M" as a parameter of type Function *.

llvm-svn: 13357

fills in a ToolArgs vector in the AbstractInterpreter if it is set. This
ToolArgs vector is used to pass additional arguments to LLI and/or LLC.
This is intended to address Bug 40.

Also, make -debug-only=toolrunner work for the LLC and CBE
AbstractInterpreters.

llvm-svn: 13356

llvm-svn: 13355

div:
        mov %EDX, DWORD PTR [%ESP + 4]
        mov %ECX, 64
        mov %EAX, %EDX
        sar %EDX, 31
        idiv %ECX
        ret

to this:

div:
        mov %EAX, DWORD PTR [%ESP + 4]
        mov %ECX, %EAX
        sar %ECX, 5
        shr %ECX, 26
        mov %EDX, %EAX
        add %EDX, %ECX
        sar %EAX, 6
        ret

Note that the intel compiler is currently making this:

div:
        movl      4(%esp), %edx                                 #3.5
        movl      %edx, %eax                                    #4.14
        sarl      $5, %eax                                      #4.14
        shrl      $26, %eax                                     #4.14
        addl      %edx, %eax                                    #4.14
        sarl      $6, %eax                                      #4.14
        ret                                                     #4.14

Which has one less register->register copy.  (hint hint alkis :)

llvm-svn: 13354

llvm-svn: 13352

This fixes PR332 and ADCE/2004-05-04-UnreachableBlock.llx

llvm-svn: 13349