Skip to content
  1. Jul 07, 2008
  2. Jul 06, 2008
  3. Jul 05, 2008
    • Nick Lewycky's avatar
      9f1a4dc6
    • Mon P Wang's avatar
      Fixed generating incorrect aligned stores that I backout of r53031 · 5c755ff5
      Mon P Wang authored
      that fixed problems in EmitStackConvert where the source and target type
      have different alignment by creating a stack slot with the max
      alignment of source and target type.
      
      llvm-svn: 53150
      5c755ff5
    • Bruno Cardoso Lopes's avatar
      Several changes to Mips backend, experimental fp support being the most · c9c3f499
      Bruno Cardoso Lopes authored
      important.
      - Cleanup in the Subtarget info with addition of new features, not all support
        yet, but they allow the future inclusion of features easier. Among new features,
        we have : Arch family info (mips1, mips2, ...), ABI info (o32, eabi), 64-bit
        integer
        and float registers, allegrex vector FPU (VFPU), single float only support.
      - TargetMachine now detects allegrex core.
      - Added allegrex (Mips32r2) sext_inreg instructions.
      - *Added Float Point Instructions*, handling single float only, and
        aliased accesses for 32-bit FPUs.
      - Some cleanup in FP instruction formats and FP register classes.
      - Calling conventions improved to support mips 32-bit EABI.
      - Added Asm Printer support for fp cond codes.
      - Added support for sret copy to a return register.
      - EABI support added into LowerCALL and FORMAL_ARGS.
      - MipsFunctionInfo now keeps a virtual register per function to track the
        sret on function entry until function ret.
      - MipsInstrInfo FP support into methods (isMoveInstr, isLoadFromStackSlot, ...),
        FP cond codes mapping and initial FP Branch Analysis.
      - Two new Mips SDNode to handle fp branch and compare instructions : FPBrcond,
        FPCmp
      - MipsTargetLowering : handling different FP classes, Allegrex support, sret
        return copy, no homing location within EABI, non 32-bit stack objects
        arguments, and asm constraint for float.
      
      llvm-svn: 53146
      c9c3f499
  4. Jul 04, 2008
  5. Jul 03, 2008
Loading