llvm-svn: 111156

llvm-svn: 111155

llvm-svn: 111154

middle, copy the elements in two groups, rather than copying all the
elements and then doing an erase on the middle of the result. These
are SmallVectors, so we shouldn't expect to hit dynamic allocation
in the common case.

llvm-svn: 111151

64 bits (was 64-bit shift intended?)", pointed out by 'nobled' on llvmdev

llvm-svn: 111148

llvm-svn: 111147

llvm-svn: 111145

llvm-svn: 111144

llvm-svn: 111143

llvm-svn: 111142

them to iterators.

llvm-svn: 111140

llvm-svn: 111138

llvm-svn: 111137

for each add instruction. Ditto for Mul.

llvm-svn: 111136

llvm-svn: 111135

uninteresting, just put all the operands on one list and make
GenerateReassociations make the decision about what's interesting.
This is simpler, and it avoids an extra ScalarEvolution::getAddExpr call.

llvm-svn: 111133

This isn't necessary, because ScalarEvolution sorts them anyway,
but it's tidier this way.

llvm-svn: 111132

implementations of equality comparison and hash computation. This
can be used to optimize node lookup by avoiding creating lots of
temporary ID values just for hashing and comparison purposes.

llvm-svn: 111130

with FoldingSetTrait::Profile.

llvm-svn: 111127

actually use ScalarEvolution.

llvm-svn: 111124

indirectbr destination lists.

llvm-svn: 111122

address-taken. This can occur normally, if the code which took the
address got DCEd.

llvm-svn: 111121

llvm-svn: 111102

llvm-svn: 111094

encoding is correct for the built-in assembler.

Based on a patch from Chris.

llvm-svn: 111083

llvm-svn: 111082

llvm-svn: 111073

llvm-svn: 111068

llvm-svn: 111063

llvm-svn: 111061

 - Eliminate redundant successors.
 - Convert an indirectbr with one successor into a direct branch.

Also, generalize SimplifyCFG to be able to be run on a function entry block.
It knows quite a few simplifications which are applicable to the entry
block, and it only needs a few checks to avoid trouble with the entry block.

llvm-svn: 111060

experimental pass that allocates locals relative to one another before
register allocation and then assigns them to actual stack slots as a block
later in PEI. This will eventually allow targets with limited index offset
range to allocate additional base registers (not just FP and SP) to
more efficiently reference locals, as well as handle situations where
locals cannot be referenced via SP or FP at all (dynamic stack realignment
together with variable sized objects, for example). It's currently
incomplete and almost certainly buggy. Work in progress.

Disabled by default and gated via the -enable-local-stack-alloc command
line option.

rdar://8277890

llvm-svn: 111059

had its address taken.

llvm-svn: 111058

This fixes another part of PR7792.

llvm-svn: 111057

The earliestStart argument is entirely specific to linear scan allocation, and
can be easily calculated by RegAllocLinearScan.

Replace std::vector with SmallVector.

llvm-svn: 111055

llvm-svn: 111050

instruction opcode.  This fixes part of PR7792.

llvm-svn: 111047

when they are the same loop. Don't compare two instructions'
loop depths when they are in the same block.

llvm-svn: 111045

When a live range is contained a single block, we can split it around
instruction clusters. The current approach is very primitive, splitting before
and after the largest gap between uses.

llvm-svn: 111043

ScalarEvolution::getAddExpr, which can be pretty expensive, when nothing
has changed, which is pretty common.

llvm-svn: 111042