llvm-svn: 53311

llvm-svn: 53310

llvm-svn: 53309

llvm-svn: 53308

llvm-svn: 53307

llvm-svn: 53306

llvm-svn: 53305

llvm-svn: 53304

llvm-svn: 53303

llvm-svn: 53302

llvm-svn: 53301

llvm-svn: 53300

llvm-svn: 53299

llvm-svn: 53298

llvm-svn: 53297

llvm-svn: 53296

llvm-svn: 53295

llvm-svn: 53294

llvm-svn: 53292

llvm-svn: 53291

llvm-svn: 53290

llvm-svn: 53280

llvm-svn: 53278

llvm-svn: 53277

llvm-svn: 53274

llvm-svn: 53272

llvm-svn: 53270

This is a question of the debugging setup code not
being called at the right time, and it's called from
target-dependent code for some reason.  I have only
attempted to fix Darwin, but I'm pretty sure it's
broken elsewhere; I'll leave that to people who can
test it.

llvm-svn: 53254

llvm-svn: 53237

llvm-svn: 53227

llvm-svn: 53215

MachineMemOperands. The pools are owned by MachineFunctions.

This drastically reduces the number of calls to malloc/free made
during the "Emit" phase of scheduling, as well as later phases
in CodeGen. Combined with other changes, this speeds up the
"instruction selection" phase of CodeGen by 10% in some cases.

llvm-svn: 53212

llvm-svn: 53209

ATT asm printer just print register AsmName's instead of calling tolower on each charater of Name. This speeds it up by 10%.

llvm-svn: 53208

TargetRegisterDesc::Name field is the same as the abstract register name. There is no need for targets to specify register names in addition to their AsmName's.

llvm-svn: 53207

pool-allocating MachineInstrs.

llvm-svn: 53198

llvm-svn: 53196

llvm-svn: 53192

llvm-svn: 53179

llvm-svn: 53177