Commits · 60dbc63a891d59b1553caca5acdba99c876e97bf · Roger Ferrer / llvm-epi-0.8

Aug 23, 2011

Temporarilly mark tMUL as not commutable. · ca2ffad8

Jim Grosbach authored Aug 22, 2011

It's not playing nicely in the coalescer with the tied operand. Disable
commutability for now while we figure out the deeper fix.

llvm-svn: 138278

ca2ffad8

Aug 22, 2011
- Provide operand encoding information for half-precision VCVT instructions. ... · 061738a6
  Owen Anderson authored Aug 22, 2011
```
Provide operand encoding information for half-precision VCVT instructions.  Found by randomized testing.

llvm-svn: 138273
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  061738a6
- Add support for breaking 256-bit int VETCC into two 128-bit ones, · 74f090d4
  Bruno Cardoso Lopes authored Aug 22, 2011
```
avoding scalarization of the compare. Reduces code from 59 to 6
instructions. Fix PR10712.

llvm-svn: 138271
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  74f090d4
- Add 128-bit AVX codegen for PCMP* family of integer instructions · 6e62ca94
  Bruno Cardoso Lopes authored Aug 22, 2011
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llvm-svn: 138270
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  6e62ca94
- Fix decoding of VMOVSRR and VMOVRRS, which account for the overwhelming... · df698b03
  Owen Anderson authored Aug 22, 2011
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Fix decoding of VMOVSRR and VMOVRRS, which account for the overwhelming majority of decoder crashes detected by randomized testing.

llvm-svn: 138269
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  df698b03
- Tighten up ARM reglist validation a bit. · 5c932b24
  Jim Grosbach authored Aug 22, 2011
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llvm-svn: 138258
```
  5c932b24
- Fix another batch of VLD/VST decoding crashes discovered by randomized testing. · 721c3704
  Owen Anderson authored Aug 22, 2011
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llvm-svn: 138255
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  721c3704
- Correct writeback handling of duplicating VLD instructions. Discovered by randomized testing. · ac92e77b
  Owen Anderson authored Aug 22, 2011
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llvm-svn: 138251
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  ac92e77b
- Clean up predicates on ARM target instruction aliases. · 6caa557a
  Jim Grosbach authored Aug 22, 2011
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llvm-svn: 138249
```
  6caa557a
- Fix an incorrect shift when decoding SP-relative stores in Thumb1-mode. Add more tests. · b4981320
  Owen Anderson authored Aug 22, 2011
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llvm-svn: 138246
```
  b4981320
Aug 20, 2011
- Cast through intptr_t, ISO C++ requires it. · 5800a8c3
  Benjamin Kramer authored Aug 20, 2011
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llvm-svn: 138186
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  5800a8c3
- Remove the VMOVQQ pseudo instruction. · 61f92efb
  Chad Rosier authored Aug 20, 2011
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llvm-svn: 138177
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  61f92efb
- Remove VMOVQQQQ pseudo instruction. · baf5538d
  Chad Rosier authored Aug 20, 2011
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llvm-svn: 138174
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  baf5538d
- Add <imp-def> operands to QQ and QQQQ stack loads. · 59015c8b
  Jakob Stoklund Olesen authored Aug 20, 2011
```
This pleases the register scavenger and brings
test/CodeGen/ARM/2011-08-12-vmovqqqq-pseudo.ll a little closer to
working with -verify-machineinstrs.

llvm-svn: 138164
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  59015c8b
- VMOVQQQQs pseudo instructions are only created by ARMBaseInstrInfo::copyPhysReg. · be762516
  Chad Rosier authored Aug 20, 2011
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Therefore, rather then generate a pseudo instruction, which is later expanded,
generate the necessary instructions in place.

llvm-svn: 138163
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  be762516
- Thumb parsing and encoding support for NOP. · 2597722e
  Jim Grosbach authored Aug 19, 2011
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The irony is not lost that this is not a completely trivial patchset.

llvm-svn: 138143
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  2597722e
- Fix bug in function IsShiftedMask. Remove parameter SizeInBits, which is not · 419fd4f3
  Akira Hatanaka authored Aug 19, 2011
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needed for Mips32.

llvm-svn: 138132
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  419fd4f3
- Thumb assembly parsing and encoding for NEG. · 37aa3481
  Jim Grosbach authored Aug 19, 2011
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llvm-svn: 138131
```
  37aa3481
- Fix NEG alias · 8022015a
  Jim Grosbach authored Aug 19, 2011
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llvm-svn: 138125
```
  8022015a
- Be more lenient on tied operand matching for MUL. · 459422d7
  Jim Grosbach authored Aug 19, 2011
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llvm-svn: 138124
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  459422d7
- Re-write part of VEX encoding logic, to be more easy to read! Also fix · d126347f
  Bruno Cardoso Lopes authored Aug 19, 2011
```
a bug and add a testcase!

llvm-svn: 138123
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  d126347f
- Update tests. · 066e9ec1
  Jim Grosbach authored Aug 19, 2011
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llvm-svn: 138116
```
  066e9ec1
- Thumb assembly parsing and encoding for MUL. · 8e048495
  Jim Grosbach authored Aug 19, 2011
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llvm-svn: 138108
```
  8e048495
Aug 19, 2011
- Thumb assembly parsing and encoding for MOV. · f86cd37b
  Jim Grosbach authored Aug 19, 2011
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llvm-svn: 138076
```
  f86cd37b
- Tidy up. Tab character. · dbb60f96
  Jim Grosbach authored Aug 19, 2011
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llvm-svn: 138072
```
  dbb60f96
- Tab characters. · 9c920490
  Jim Grosbach authored Aug 19, 2011
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llvm-svn: 138066
```
  9c920490
- Thumb assembly parsing and encoding for LSL(immediate). · 5503c3a4
  Jim Grosbach authored Aug 19, 2011
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llvm-svn: 138063
```
  5503c3a4
- Thumb assembly parsing and encoding for LDRSB and LDRSH. · 7c4739da
  Jim Grosbach authored Aug 19, 2011
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llvm-svn: 138061
```
  7c4739da
- Thumb assembly parsing and encoding for LDRH. · 26d3587b
  Jim Grosbach authored Aug 19, 2011
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llvm-svn: 138060
```
  26d3587b
- Thumb assembly parsing and encoding for LDRB. · a32c753e
  Jim Grosbach authored Aug 19, 2011
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llvm-svn: 138059
```
  a32c753e
- Thumb assembly parsing and encoding for LDR(literal). · 181d2f92
  Jim Grosbach authored Aug 19, 2011
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llvm-svn: 138052
```
  181d2f92
- Thumb assembly parsing and encoding for LDR(immediate) form T2. · 23983d6b
  Jim Grosbach authored Aug 19, 2011
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llvm-svn: 138050
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  23983d6b
- Use helper function to check for low registers. · 74733297
  Jim Grosbach authored Aug 19, 2011
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llvm-svn: 138048
```
  74733297
- Thumb assembly parsing and encoding for LDR(immediate) form T1. · 3fe94e3e
  Jim Grosbach authored Aug 19, 2011
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llvm-svn: 138047
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  3fe94e3e
- Add explanatory comment. · e9380704
  Jim Grosbach authored Aug 19, 2011
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llvm-svn: 138042
```
  e9380704
- Have SPU backend use the external TCE scheduler, if the library is loaded as a · 024d2614
  Kalle Raiskila authored Aug 19, 2011
```
module.

Patch by Pekka Jääskeläinen.

llvm-svn: 138037
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  024d2614
- Add TB encoding to VEX versions of SSE fp logical operations to fix disassembler · ba6c2a52
  Craig Topper authored Aug 19, 2011
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llvm-svn: 138034
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  ba6c2a52
- Fix PR10677. Initial patch and idea by Peter Cooper but I've changed the · 22241acc
  Bruno Cardoso Lopes authored Aug 19, 2011
```
implementation!

llvm-svn: 138029
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  22241acc
- Make a bunch of symbols private. · 4938edb0
  Benjamin Kramer authored Aug 19, 2011
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llvm-svn: 138025
```
  4938edb0
- Re-encoded 128-bit AVX versions of SQRT, RSQRT, RCP have 3 operands · 5647d84a
  Bruno Cardoso Lopes authored Aug 18, 2011
```
instead of 2. They were already defined this way in their regular
version, but not for the intrinsics versions (*_Int), and that would work
for assembly emission but not for object code, since a MachineOperand
would be missing. This commit fix PR10697.

Also removed the {VSQRT,VRSQRT,VRCP}r_Int forms and match the intrinsic
via INSERT_SUBREG+EXTRACT_SUBREG patterns. The same couldn't be done for
memory versions because sse_load_f32/sse_load_f64 operand need special
handling and don't work like regular "addr" operands.

There are right now 114 "*_Int" and 98 "Int_*" forms! I'm slowly
removing them as I step through, but hope we can get rid of these
someday, they are really annoying :)

llvm-svn: 138012
```
  5647d84a