Commits · 6124cae8f7656c9c75941dc2f480404dde491200 · Roger Ferrer / llvm-epi-0.8 · GitLab

This project is archived. Its data is read-only.

Mar 31, 2018
- [DAGCombine] (float)((int) f) --> ftrunc (PR36617) · 6124cae8
  Sanjay Patel authored Mar 31, 2018
  6124cae8
Mar 30, 2018
- [SelectionDAG] Removing FABS folding from DAGCombiner · e09b7dcf
  Sanjay Patel authored Mar 30, 2018
  e09b7dcf
- [MachineCopyPropagation] Handle COPY with overlapping source/dest. · 208fe67a
  Eli Friedman authored Mar 30, 2018
  208fe67a
Mar 28, 2018
- [MachineOutliner] Simplify call outlining + require valid callee save info for call outlining · 4aa14dbc
  Jessica Paquette authored Mar 28, 2018
  4aa14dbc
- [AArch64] add ftrunc tests; NFC · bb33007b
  Sanjay Patel authored Mar 28, 2018
  bb33007b
- [MachineOutliner] AArch64: Don't outline ADRPs with un-outlinable operands · 2519ee70
  Jessica Paquette authored Mar 27, 2018
  2519ee70
Mar 27, 2018
- Fix a reoccuring typo in load-combine tests · ca1d849c
  Artur Pilipenko authored Mar 27, 2018
  ca1d849c
- Use .set instead of = when printing assignment in assembly output · 52396bb9
  Krzysztof Parzyszek authored Mar 27, 2018
  52396bb9
Mar 23, 2018
- [AArch64] Don't reduce the width of loads if it prevents combining a shift · e3b44f9d
  John Brawn authored Mar 23, 2018
  e3b44f9d
- [GlobalISel] Fix legalizer combine to not use illegal input G_EXTRACT. · f5423559
  Amara Emerson authored Mar 23, 2018
  f5423559
- State that CFG is preserved in 'Falkor HW Prefetch Fix Late Phase'. · fab7a676
  Michael Zolotukhin authored Mar 22, 2018
  fab7a676
- Reapply "[test] Add tests for llc passes pipelines." with a fix for bots with expensive checks on. · 3520331f
  Michael Zolotukhin authored Mar 22, 2018
  3520331f
Mar 22, 2018
- [CodeGen] Add a new pass for PostRA sink · 2ecb7ba4
  Jun Bum Lim authored Mar 22, 2018
  2ecb7ba4
- [GISel]: Fix incorrect IRTranslation while translating null pointer types · b3297ef0
  Aditya Nandakumar authored Mar 22, 2018
  b3297ef0
- Revert "[test] Add tests for llc passes pipelines." · 7e69dd02
  Jonas Devlieghere authored Mar 22, 2018
  7e69dd02
Mar 21, 2018
- [test] Add tests for llc passes pipelines. · 7e6fa1d6
  Michael Zolotukhin authored Mar 21, 2018
  7e6fa1d6
Mar 20, 2018
- [AArch64] Add vmulxh_lane fp16 vector intrinsic · 4c60c222
  Abderrazek Zaafrani authored Mar 20, 2018
  4c60c222
- [AArch64] add fabs tests for PR36600; NFC · 5a9210e6
  Sanjay Patel authored Mar 20, 2018
  5a9210e6
Mar 19, 2018
- [MachineOutliner] AArch64: Emit CFI instructions when outlining calls · 563548d8
  Jessica Paquette authored Mar 19, 2018
  563548d8
- [ARM, AArch64] Check the no-stack-arg-probe attribute for dynamic stack probes · 9a55c1b0
  Martin Storsjo authored Mar 19, 2018
  9a55c1b0
Mar 16, 2018
- [MachineOutliner] Make KILLs invisible · b3e7dc91
  Jessica Paquette authored Mar 16, 2018
  b3e7dc91
Mar 15, 2018
- [AArch64] Codegen tests for the Armv8.2-A FP16 intrinsics · dfc7eb49
  Sjoerd Meijer authored Mar 15, 2018
  dfc7eb49
Mar 14, 2018
- [FastISel] Sink local value materializations to first use · 3a7a2e4a
  Reid Kleckner authored Mar 14, 2018
  3a7a2e4a
- [CodeGen] Use MIR syntax for MachineMemOperand printing · e85b06d6
  Francis Visoiu Mistrih authored Mar 14, 2018
  e85b06d6
- [AArch64] Emit CSR loads in the same order as stores · 164560bd
  Francis Visoiu Mistrih authored Mar 14, 2018
  164560bd
- [AArch64] Keep track of MIFlags in the LoadStoreOptimizer · 084e7d87
  Francis Visoiu Mistrih authored Mar 14, 2018
  084e7d87
- [AArch64] Don't produce R_AARCH64_TLSLE_LDST32_TPREL_LO12_NC · bde67728
  Martin Storsjo authored Mar 14, 2018
  bde67728
Mar 12, 2018
- [AArch64] Fold adds with tprel_lo12_nc and secrel_lo12 into a following ldr/str · 7bc64bd8
  Martin Storsjo authored Mar 12, 2018
  7bc64bd8
Mar 11, 2018
- Revert r327199: "Clean up a temp file on the buildbots" · 2282cc2a
  George Burgess IV authored Mar 10, 2018
  2282cc2a
Mar 10, 2018
- [AArch64] Implement native TLS for Windows · cc24096d
  Martin Storsjo authored Mar 10, 2018
  cc24096d
- Clean up a temp file on the buildbots. · 088809de
  George Burgess IV authored Mar 10, 2018
  088809de
Mar 09, 2018
- [x86][aarch64] ask the backend whether it has a vector blend instruction · b4bd0a40
  Sebastian Pop authored Mar 09, 2018
  b4bd0a40
- [AArch64] Fix use of a regex in the win-alloca.ll test. NFC. · ccac66da
  Martin Storsjo authored Mar 09, 2018
  ccac66da
- Attempt to fix vecreduce-propagate-sd-flags.ll test. · 5a91fc6f
  Matt Morehouse authored Mar 09, 2018
  5a91fc6f
- Propagate flags to SDValue in SplitVecOp_VECREDUCE · 986865c0
  Sameer AbuAsal authored Mar 08, 2018
  986865c0
Mar 07, 2018
- [AArch64] add missing pattern for insert_subvector undef · 33bdb3e0
  Sebastian Pop authored Mar 07, 2018
  33bdb3e0
Mar 06, 2018
- [AArch64] define isExtractSubvectorCheap · 41073e80
  Sebastian Pop authored Mar 06, 2018
  41073e80
Mar 05, 2018
- GlobalISel: IRTranslate llvm.fabs.* intrinsic · 2bc42e90
  Volkan Keles authored Mar 05, 2018
  2bc42e90
- [AArch64] Harden test case · f29e35af
  Evandro Menezes authored Mar 05, 2018
  f29e35af
- fix PR36582 · ac0bfb59
  Sebastian Pop authored Mar 05, 2018
  ac0bfb59