llvm-svn: 117651

llvm-svn: 117648

fully enumerated.

llvm-svn: 117647

vldr.64 to work.  I have no idea if this is fully right, but 
it is in the right direction.

llvm-svn: 117626

t.s:1:14: error: invalid operand for instruction
vldr.64	d17, [r0]   
       	     ^

instead of:

t.s:1:1: error: unrecognized instruction
vldr.64	d17, [r0]   
^

llvm-svn: 117611

llvm-svn: 117605

llvm-svn: 117603

llvm-svn: 117560

llvm-svn: 117559

#includes in the process.

llvm-svn: 116919

an instruction that requires a WHOLE NEW wonderful kind of alias.

llvm-svn: 115015

MCStreamer to emit into instead of an MCInst to fill in.  This allows the
matcher extra flexibility and is more convenient.

llvm-svn: 115014

the end of the line on a parser error, allowing skipping to happen
for syntactic errors but not for semantic errors.  Before we would
miss emitting a diagnostic about the second line, because we skipped
it due to the semantic error on the first line:

  foo %eax
  bar %al

This fixes rdar://8414033 - llvm-mc ignores lines after an invalid instruction mnemonic errors

llvm-svn: 113688

implementation's job to check for and lex the EndOfStatement
marker.

llvm-svn: 113347

of a mneumonic, report operand errors with better location
info.  For example, we now report:

t.s:6:14: error: invalid operand for instruction
        cwtl $1
             ^

but we fail for common cases like:

t.s:11:4: error: invalid operand for instruction
   addl $1, $1
   ^

because we don't know if this is supposed to be the reg/imm or imm/reg
form.

llvm-svn: 113178

llvm-svn: 113165

into the middle of the class, and rework how the different sections of
the generated file are conditionally included for simplicity.

llvm-svn: 113163

llvm-svn: 112712

instructions onto the target specific parser, which can do a better job.

llvm-svn: 110889

target specific parsers can adapt the TargetAsmParser to this.

llvm-svn: 110888

MC/ARM: Add basic support for handling predication by parsing it out of the mnemonic into a separate operand form.

llvm-svn: 110794

llvm-svn: 110793

llvm-svn: 110792

llvm-svn: 110790

llvm-svn: 110788

llvm-svn: 110783

 - Unfortunate, but necessary for now to handle subtarget instruction matching. Eventually we should factor out the lower level target machine information so we don't need to do this.

llvm-svn: 108664

llvm-svn: 108366

llvm-svn: 108130

and thumb_mode.

llvm-svn: 107133

a simple mapping of register names to IDs to
identify register tokens.

llvm-svn: 100685

to the ARM AsmParser.

llvm-svn: 100232

llvm-svn: 94129

the two token accessor functions are declared consistently.
Modified the clients of MCAsmParser to reflect this change.

llvm-svn: 93916

MCAsmParser, and changed the target-specific AsmParsers
to use it.

llvm-svn: 93900

identifier.  There is no way to work around it.

llvm-svn: 93896

the new ParseInstruction method just parses and returns a list of
target operands.  A new MatchInstruction interface is used to
turn the operand list into an MCInst.

This requires new/deleting all the operands, but it also gives 
targets the ability to use polymorphic operands if they want to. 

llvm-svn: 93469

Pass in SMLoc of instr opcode into ParseInstruction.
Make AsmToken be a class, not a struct.

llvm-svn: 93457

llvm-svn: 93455

mainly used in debugging and/or assert situations. It should make the compiler
and the static analyzer stop nagging us about them.

llvm-svn: 92181