llvm-svn: 14287

llvm-svn: 14283

llvm-svn: 14266

llvm-svn: 14231

llvm-svn: 14230

llvm-svn: 14229

using the local & in regs first because they are not clobbered by calls.

llvm-svn: 14228

llvm-svn: 14227

Replace it with a working class for FP instrs.

llvm-svn: 14226

Add some FP moves.

llvm-svn: 14225

Use this for printing the jmpl indirect-call instruction.

llvm-svn: 14224

Support indirect calls.
Support returning a float value.

llvm-svn: 14223

llvm-svn: 14217

Support copying floating-point constants to registers.
Add assertion to visitCallInst to abort if we hit a NULL calledFunction, for now.

llvm-svn: 14216

mov REG, C
sub REG, X

generate:

neg X
add X, C

which uses one less reg

llvm-svn: 14213

the setcc.

llvm-svn: 14212

Make copyRegToReg return 1 instead of -1.
Edit a comment in emitPrologue().

llvm-svn: 14211

Add a FIXME about the (currently unused) JMPL instructions.

llvm-svn: 14210

llvm-svn: 14209

modifications for 1 LLVM BB --> many MBBs).
Fix store operand order: make it always be Base, Offset, SrcReg (think
"[ Base + Offset ] = SrcReg").
Rewrite visitBranchInst() to be even dumber (but working) -- give up on
the branch fallthrough trick, for the time being.
Make visitSetCondInst() work.

llvm-svn: 14208

llvm-svn: 14207

we do not want to fold the load in cases like this:

  X = load
    = add A, X
    = add B, X

llvm-svn: 14204

Abort if we see a PCRelativeDisp MachineOperand, to be safe. This matches
the X86 backend.

llvm-svn: 14202

llvm-svn: 14201

llvm-svn: 14189

llvm-svn: 14185

to visitBinaryOperator.

llvm-svn: 14182

llvm-svn: 14179

getReg() on void value.

llvm-svn: 14178

on a double-word boundary instead of a single-word boundary.

llvm-svn: 14177

non-register, non-immed. arguments to SETHI and OR using %hi() and
%lo() respectively.

llvm-svn: 14176

Support copying long constants to register pairs.
Support copying ConstantPointerNulls and ConstantPointerRefs to registers.

llvm-svn: 14175

llvm-svn: 14172

peepholing, and make it work the same way in the JIT as in LLC.

llvm-svn: 14170

comparisons.  In an 'isunordered' predicate, which looks like this at
the LLVM level:

        %a = call bool %llvm.isnan(double %X)
        %b = call bool %llvm.isnan(double %Y)
        %COM = or bool %a, %b

We used to generate this code:

        fxch %ST(1)
        fucomip %ST(0), %ST(0)
        setp %AL
        fucomip %ST(0), %ST(0)
        setp %AH
        or %AL, %AH

With this patch, we generate this code:

        fucomip %ST(0), %ST(1)
        fstp %ST(0)
        setp %AL

Which should make alkis happy.  Tested as X86/compare_folding.llx:test1

llvm-svn: 14148

llvm-svn: 14146

llvm-svn: 14145

we can get rid of the FpUCOM/FpUCOMi pseudo instructions, which makes stuff simpler
and faster.

llvm-svn: 14144

twoarg cases.

llvm-svn: 14143

testcase

llvm-svn: 14141