llvm-svn: 80807

llvm-svn: 80806

llvm-svn: 80773

llvm-svn: 80764

conditional moves as a subtarget feature.  This is the easy part of 
PR4841.

llvm-svn: 80763

Added a 64-bit ADD %RAX, imm32 instruction.
Added all 4 forms for AND %rAX, imm and CMP %rAX, imm.

llvm-svn: 80746

llvm-svn: 80729

 - Bruno, please check!!

llvm-svn: 80728

llvm-svn: 80727

Remove Offset from ExternalSybmol MachineOperands, this is unused (and at least partly unsupported, in X86 encoding at least).

llvm-svn: 80726

Added TEST %rAX, $imm instructions to the Intel tables.  These are required for the X86 disassembler.

llvm-svn: 80696

 - Down to 7 failures on 403.gcc.

llvm-svn: 80605

Stop printing old asm printing code inline with -experimental-asm-printer (this allows diffing and assembling the .s)

llvm-svn: 80604

llvm-svn: 80603

handling on x86-32 linux.

llvm-svn: 80592

llvm-svn: 80584

Also, use MCInst::print instead of custom code in MCAsmPrinter.

llvm-svn: 80575

llvm-svn: 80485

a register to 0. This fixes PR4814.

llvm-svn: 80445

  encodings.
- Make some of the values emitted by the FDEs dependent upon the pointer
  size. This is in line with how GCC does things. And it has the benefit of
  working for Darwin in 64-bit mode now.

llvm-svn: 80428

Some other minor win64 fixes as well.

Patch by Michael Beck!

llvm-svn: 80370

llvm-svn: 80271

llvm-svn: 80269

llvm-svn: 80268

 - Note, this is a gigantic hack, with the sole purpose of unblocking further
   work on the assembler (its also possible to test the mathcer more completely
   now).

 - Despite being a hack, its actually good enough to work over all of 403.gcc
   (although some encodings are probably incorrect). This is a testament to the 
   beauty of X86's MachineInstr, no doubt! ;)

llvm-svn: 80234

llvm-svn: 80232

llvm-svn: 80186

moves. This avoids the need to promote the operands (or implicitly
extend them, a partial register update condition), and can reduce
i8 register pressure. This substantially speeds up code such as
write_hex in lib/Support/raw_ostream.cpp.

subclass-coalesce.ll is too trivial and no longer tests what it was
originally intended to test.

llvm-svn: 80184

leads to partial-register definitions. To help avoid redundant
zero-extensions, also teach the h-register matching patterns that
use movzbl to match anyext as well as zext.

llvm-svn: 80099

llvm-svn: 80012

llvm-svn: 79961

llvm-svn: 79873

llvm-svn: 79853

llvm-svn: 79834

MachineInstr and MachineOperand.  This required eliminating a
bunch of stuff that was using DOUT, I hope that bill doesn't
mind me stealing his fun. ;-)

llvm-svn: 79813

llvm-svn: 79780

llvm-svn: 79777

llvm-svn: 79773

llvm-svn: 79763

llvm-svn: 79742