llvm-svn: 14240

llvm-svn: 14239

llvm-svn: 14238

llvm-svn: 14237

llvm-svn: 14236

llvm-svn: 14235

* Order #includes alphabetically

llvm-svn: 14234

llvm-svn: 14233

llvm-svn: 14232

llvm-svn: 14231

llvm-svn: 14230

llvm-svn: 14229

using the local & in regs first because they are not clobbered by calls.

llvm-svn: 14228

llvm-svn: 14227

Replace it with a working class for FP instrs.

llvm-svn: 14226

Add some FP moves.

llvm-svn: 14225

Use this for printing the jmpl indirect-call instruction.

llvm-svn: 14224

Support indirect calls.
Support returning a float value.

llvm-svn: 14223

llvm-svn: 14222

occurs due to unordered comparison macros in math.h

llvm-svn: 14221

llvm-svn: 14220

things from happening due to

declare bool %llvm.isunordered(double, double)
declare bool %llvm.isunordered(float, float)

llvm-svn: 14219

llvm-svn: 14218

llvm-svn: 14217

Support copying floating-point constants to registers.
Add assertion to visitCallInst to abort if we hit a NULL calledFunction, for now.

llvm-svn: 14216

llvm-svn: 14215

llvm-svn: 14214

mov REG, C
sub REG, X

generate:

neg X
add X, C

which uses one less reg

llvm-svn: 14213

the setcc.

llvm-svn: 14212

Make copyRegToReg return 1 instead of -1.
Edit a comment in emitPrologue().

llvm-svn: 14211

Add a FIXME about the (currently unused) JMPL instructions.

llvm-svn: 14210

llvm-svn: 14209

modifications for 1 LLVM BB --> many MBBs).
Fix store operand order: make it always be Base, Offset, SrcReg (think
"[ Base + Offset ] = SrcReg").
Rewrite visitBranchInst() to be even dumber (but working) -- give up on
the branch fallthrough trick, for the time being.
Make visitSetCondInst() work.

llvm-svn: 14208

llvm-svn: 14207

llvm-svn: 14206

llvm-svn: 14205

we do not want to fold the load in cases like this:

  X = load
    = add A, X
    = add B, X

llvm-svn: 14204

PR371

llvm-svn: 14203

Abort if we see a PCRelativeDisp MachineOperand, to be safe. This matches
the X86 backend.

llvm-svn: 14202

llvm-svn: 14201