Commits · 64e8a13b7b2599c69219deda884844506e87eef2 · Roger Ferrer / llvm-epi-0.8

Aug 14, 2003
- Since we now have TableGen editing modes for VIM and (X)Emacs, we no longer need · 4aab2b25
  Misha Brukman authored Aug 14, 2003
```
to mark TableGen description files with "C++ mode".

llvm-svn: 7841
```
  4aab2b25
Aug 04, 2003
- Transition to using 'let X = y' instead of 'set X = y'. · 9fb7e0a4
  Chris Lattner authored Aug 04, 2003
```
llvm-svn: 7565
```
  9fb7e0a4
Jul 30, 2003
- We no longer need to preprocess SparcV9.td before sending it through tablegen · a979d4dd
  Chris Lattner authored Jul 30, 2003
```
llvm-svn: 7437
```
  a979d4dd
Jul 29, 2003
- * Cleaned up and corrected comments wrt instruction formats · 0f918540
  Misha Brukman authored Jul 29, 2003
```
* Enabled STXFSR instructions

llvm-svn: 7400
```
  0f918540
Jul 08, 2003
- Elaborated assembly syntax of instructions in the comments. · ea6e7a5d
  Misha Brukman authored Jul 07, 2003
```
llvm-svn: 7120
```
  ea6e7a5d
Jul 02, 2003
- Properly fix instruction syntax in comments, using `imm' for instructions that · 81951e11
  Misha Brukman authored Jul 02, 2003
```
use an immediate value instead of a register.

llvm-svn: 7072
```
  81951e11
- Fixed instruction syntax in the comments (specifies how instr is used). · 6f9caec5
  Misha Brukman authored Jul 02, 2003
```
llvm-svn: 7071
```
  6f9caec5
Jun 21, 2003
- Some preprocessors doen't support // comments and get confused · 9cb6b02d
  Chris Lattner authored Jun 20, 2003
```
llvm-svn: 6821
```
  9cb6b02d
Jun 06, 2003
- * Changed Bcc instructions to behave like BPcc instructions · 2969ec52
  Misha Brukman authored Jun 06, 2003
```
* BPA and BPN do not take a %cc register as a parameter
* SLL/SRL/SRA{r,i}5 are there for a reason - they are ONLY 32-bit instructions
* Likewise, SLL/SRL/SRAX{r,i}6 are only 64-bit
* Added WRCCR{r,i} opcodes

llvm-svn: 6655
```
  2969ec52
- The SUB*i instructions belong to a different class than their SUB*r brethren. · ee21ccc6
  Misha Brukman authored Jun 06, 2003
```
llvm-svn: 6644
```
  ee21ccc6
- Do not preset the cc register, the instructions actually use it. · fd394b76
  Misha Brukman authored Jun 05, 2003
```
llvm-svn: 6637
```
  fd394b76
Jun 05, 2003

* The textual output of (non-)predicted FP branches is the same. · 9ac56f84

Misha Brukman authored Jun 05, 2003

* Stop mapping FBcc instructions to deprecated opcodes, map to FBPcc instead.
* Fixed opf in FCMPxy instructions.

llvm-svn: 6632

9ac56f84

All store instructions really want 'rd' in the first field. · cbbe7ac6

Misha Brukman authored Jun 05, 2003

Special cases: STFSRx and STXFSRx - they operate on predefined rd=0 or rd=1, and
expect %fsr as the parameter in assembly. They are disabled (since not used)
until an encoding, both for code generation and output, is chosen.

llvm-svn: 6619

cbbe7ac6

Jun 04, 2003
- Added the 4.7 instruction class and all the FMOVcc instructions in them. · 7be5063c
  Misha Brukman authored Jun 04, 2003
```
llvm-svn: 6601
```
  7be5063c
- Comment out opcodes currently unused in the Sparc backend. · 11cfb6f7
  Misha Brukman authored Jun 04, 2003
```
llvm-svn: 6597
```
  11cfb6f7
- Added instruction format class 3.15 and floating-point compare instructions. · 37586db4
  Misha Brukman authored Jun 04, 2003
```
llvm-svn: 6594
```
  37586db4
Jun 03, 2003

Store instructions are different from other Format 3.1/3.2 instructions in that · b54bf540

Misha Brukman authored Jun 03, 2003

they prefer the destination register to be last. Thus, two new classes were made
for them that accomodate for having this layout of operands (F3_1rd, F3_2rd).

llvm-svn: 6564

b54bf540

* Added section A.34: Move FP register on int reg condition (FMOVr) · bbd10f96

Misha Brukman authored Jun 03, 2003

* Labeled sections that are not currently used in the Sparc backend as not
  requiring completion at this time.

llvm-svn: 6562

bbd10f96

Jun 02, 2003

Added MOVR (move int reg on register condition), aka comparison with zero. · f545b240

Misha Brukman authored Jun 02, 2003

None of these instructions are actually used in the Sparc backend, so no changes
were required in the instruction selector.

llvm-svn: 6549

f545b240

SparcInstr.def: added 'r' and 'i' versions of MOV(F)cc instructions · 843d6933

Misha Brukman authored Jun 02, 2003

SparcInstrSelection.cpp:
* Fixed opcodes to return correct 'i' version since the two functions are each
  only used in one place.
* Changed name of function to have an 'i' in the name to signify that they each
  return an immediate form of the opcode.
* Added a warning if either of the functions is ever used in a context which
  requires a register-version opcode.

SparcV9_F4.td: fixed class F4_3, added F4_4 and notes that F4_{1,2} need fixing
SparcV9.td: added the MOV(F)cc instructions

llvm-svn: 6548

843d6933

* Added casts to/from floating-point to integers. · 609b55c2
Misha Brukman authored Jun 02, 2003
```
* Changed // comments to #ifdef 0 to maintain syntax highlighting.

llvm-svn: 6546
```
609b55c2

May 31, 2003
- * Put back into action SLL/SRL/SRA{r,i}6 instructions · c4f029f8
  Misha Brukman authored May 31, 2003
```
* Fixed page numbers referring to the Sparc manual

llvm-svn: 6460
```
  c4f029f8
May 30, 2003
- Fixed the namespace to match SparcInternals.h; added notes on some missing · 0757de60
  Misha Brukman authored May 30, 2003
```
sections of instructions.

llvm-svn: 6448
```
  0757de60
May 29, 2003
- Fixed to use the correct format of the instruction. · 794c8a13
  Misha Brukman authored May 29, 2003
```
llvm-svn: 6390
```
  794c8a13
- * Broke up SparcV9.td into separate files as it was getting unmanageable · ea4f4983
  Misha Brukman authored May 29, 2003
```
* Added some Format 4 classes, but not instructions
* Added notes on missing sections with FIXMEs
* Added RDCCR instr

llvm-svn: 6388
```
  ea4f4983
May 28, 2003

Fixed ordering of elements in instructions: although the binary instructions · fded3595

Misha Brukman authored May 28, 2003

list (rd, rs1, imm), in that order (bit-wise), the actual assembly syntax is
instr rd, imm, rs1, and that is how they are constructed in the instruction
selector. This fixes the discrepancy.

Also fixed some comments along the same lines and fixed page numbers referring
to where instructions are described in the Sparc manual.

llvm-svn: 6384

fded3595

May 27, 2003
- Added definitions for a bunch of floating-point instructions. · d452b606
  Misha Brukman authored May 27, 2003
```
llvm-svn: 6356
```
  d452b606
May 07, 2003
- Added the initial version of the TableGen description for the Sparc backend. · 25e907da
  Misha Brukman authored May 07, 2003
```
llvm-svn: 6021
```
  25e907da