llvm-svn: 47573

and StoreSDNode into LSBaseSDNode.

llvm-svn: 47570

{S,U}MUL_LOHI with an unused high value.

llvm-svn: 47569

result into a MUL late in the X86 codegen process. ISD::MUL is
once again Legal on X86, so this is no longer needed. And, the
hack was suboptimal; see PR1874 for details.

llvm-svn: 47567

llvm-svn: 47566

llvm-svn: 47563

a SignBitIsZero function to simplify a common use case.

llvm-svn: 47561

llvm-svn: 47558

All remat'ed loads cannot be folded into two-address code. Not just argument loads. This change doesn't really have any impact on codegen.

llvm-svn: 47557

llvm-svn: 47556

llvm-svn: 47555

of TokenFactor underneath chain (seems to be enough)

llvm-svn: 47554

that combines getValueType and MVT::getSizeInBits, since this
occurrs frequently.

llvm-svn: 47552

result and operand types are legal.

llvm-svn: 47546

llvm-svn: 47545

not safe.  This is fixed by more aggressively checking that the return slot is
not used elsewhere in the function.

llvm-svn: 47544

llvm-svn: 47542

Fix an issue where GVN would try to use an instruction before its definition when performing return slot optimization.

llvm-svn: 47541

out of illegal elements (BUILD_VECTOR).  Uses and beefs
up BUILD_PAIR, though it didn't really have to.  Like
most of LegalizeTypes, does not support soft-float.
This cures all "make check" vector building failures.

llvm-svn: 47537

%r3 on PPC) in their ASM files. However, it's hard for humans to read
during debugging. Adding a new field to the register data that lets you
specify a different name to be printed than the one that goes into the
ASM file -- %x3 instead of %r3, for instance.

llvm-svn: 47534

llvm-svn: 47533

for CellSPU modifications:

- SPUInstrInfo.td refactoring: "multiclass" really is _your_ friend.
- Other improvements based on refactoring effort in SPUISelLowering.cpp,
  esp. in SPUISelLowering::PerformDAGCombine(), where zero amount shifts and
  rotates are now eliminiated, other scalar-to-vector-to-scalar silliness
  is also eliminated.
- 64-bit operations are being implemented, _muldi3.c gcc runtime now
  compiles and generates the right code. More work still needs to be done.

llvm-svn: 47532

llvm-svn: 47531

llvm-svn: 47529

llvm-svn: 47527

If remating a machine instr with virtual register operand, make sure the vr is avaliable at all uses regardless of whether it would be folded.

llvm-svn: 47526

llvm-svn: 47525

llvm-svn: 47524

invalid command-line options.

llvm-svn: 47523

No need recognize load from a fixed argument slot as re-materializable. LiveIntervalAnalysis already handles it as a special case.

llvm-svn: 47522

llvm-svn: 47521

Recognize loads of arguments as re-materializable first. Therefore if isReallyTriviallyReMaterializable() returns true it doesn't confuse it as a "normal" re-materializable instruction.

llvm-svn: 47520

llvm-svn: 47519

llvm-svn: 47518

llvm-svn: 47517

llvm-svn: 47516

llvm-svn: 47514

llvm-svn: 47513

llvm-svn: 47511

llvm-svn: 47510