llvm-svn: 127803

Don't construct two CFGs just to run -Wuninitialized.  While this causes new warnings to be flagged under -Wconditional-uninitialized, this is something we
can improve over time.

llvm-svn: 127802

llvm-svn: 127801

test/CodeGen/X86/h-registers-1.ll: Add explicit -mtriple=x86_64-linux. It does not need to be checked on x86_64-win32 (aka Win64).

llvm-svn: 127800

llvm-svn: 127799

llvm-svn: 127798

Teach VariadicMethodTypeChecker that CF references are valid arguments to variadic Objective-C methods.

llvm-svn: 127797

Tweak RegionStore's handling of lazy compound values to use the 'Default' versus 'Direct' binding key, thus allowing specific elements of an array/struct to be overwritten without
invalidating the entire binding.  Fixes PR 9455.

llvm-svn: 127796

llvm-svn: 127794

llvm-svn: 127793

llvm-svn: 127788

change in functionality intended.

llvm-svn: 127787

llvm-svn: 127786

read the memory contents of the function, and then feed the bytes to the
'llvm-mc -disassemble' command.

It uses the pexpect module located under ToT/test/pexpect-2.4 directory to
automate the interaction with gdb.  This is used initially to test the low
level ARM disassembler of llvm.

llvm-svn: 127785

llvm-svn: 127783

which the testsuite is run against.

llvm-svn: 127782

of an file.

llvm-svn: 127781

While here, add VK_ARM_TPOFF and VK_ARM_GOTTPOFF, too.

llvm-svn: 127780

llvm-svn: 127779

llvm-svn: 127778

not being consistent at all with other parts of the GCC implementation.

llvm-svn: 127777

walk the preprocessing record *before* walking the declarations, so
they we pretend that we actually respect the phases of translation.

We still walk the preprocessing record after the declarations when
performing token annotation or finding the cursor at a location, since
those routines depend on those semantics.

Fixes <rdar://problem/9137195>.

llvm-svn: 127776

llvm-svn: 127775

The register allocator needs to adjust its live interval unions when that happens.

llvm-svn: 127774

llvm-svn: 127773

The live range of a virtual register may change which invalidates the cached
interference information.

llvm-svn: 127772

llvm-svn: 127771

Add code to emulate STRH (Register) Arm instruction.

Remove inaccurate comments from EmulateInstruction::Context definition.

Fix contexts in a few arm instruction emulation routines.

llvm-svn: 127770

llvm-svn: 127769

llvm-svn: 127768

llvm-svn: 127767

rather than an int. Thankfully, this only causes LLVM to miss optimizations, not
generate incorrect code.

This just fixes the zext at the return. We still insert an i32 ZextAssert when
reading a function's arguments, but it is followed by a truncate and another i8
ZextAssert so it is not optimized.

llvm-svn: 127766

llvm-svn: 127765

llvm-svn: 127764

plus the test where it used to break.", which broke Clang self-host of a
Debug+Asserts compiler, on OS X.

llvm-svn: 127763

llvm-svn: 127761

llvm-svn: 127758

llvm-svn: 127757

llvm-svn: 127755

conforms to the ABI, but DAGCombine could in theory recognize the sequence of
zext asserts and truncates and generate incorrect code.

llvm-svn: 127754