require call cpp file anyway, so we wouldn't gain anything by keeping them
inline.

llvm-svn: 175579

llvm-svn: 175578

Add the function attributes from an inline asm call. These don't have declarations that set the attribute groups, so we must do it on our own.

llvm-svn: 175577

MS-style inline assembly.

This is a follow-on to r175334.  Forcing a FP to be emitted doesn't ensure it
will be used.  Therefore, force the base pointer as well.  We now treat MS
inline assembly in the same way we treat functions with dynamic stack
realignment and VLAs.  This guarantees the BP will be used to reference 
parameters and locals.
rdar://13218191

llvm-svn: 175576

attributes yet, so just issue the appropriate diagnostics. Also generalize the
fixit for attributes-in-the-wrong-place code and reuse it here, if attributes
are placed after the access-specifier or 'virtual' in a base specifier.

llvm-svn: 175575

llvm-svn: 175574

<rdar://problem/13093321>

llvm-svn: 175573

llvm-svn: 175572

which uses it. This is not ideal, but it ought to at least restore the
behavior to what it was before.

llvm-svn: 175571

Be more user-friendly about not having scripting enabled:
a) if Python was built-out then tell people about it explicitly
b) if we are told to use none as a scripting language, then tell people about that too

This should limit the cases where the semi-cryptic error message "there is no embedded script interpreter in this mode." actually shows

llvm-svn: 175570

excluding visibility bits.

Mips (o32 abi) specific e_header setting.

EF_MIPS_ABI_O32 needs to be set in the 
ELF header flags for o32 abi output.

Contributer: Reed Kotler
llvm-svn: 175569

llvm-svn: 175568

llvm-svn: 175567

excluding visibility bits.

Mips (Mips16) specific e_header setting.

EF_MIPS_ARCH_ASE_M16 needs to be set in the 
ELF header flags for Mips16.

Contributer: Reed Kotler
llvm-svn: 175566

llvm-svn: 175565

excluding visibility bits.

Mips (MicroMips) specific STO handling .

The st_other field settig for STO_MIPS_MICROMIPS

Contributer: Zoran Jovanovic
llvm-svn: 175564

ValueObjectSynthetic could be wrapping a ValueObjectDynamic. In that case, we want to report that the ValueObject is dynamic since synthetic values are supposed to be just their parent with different children

llvm-svn: 175563

llvm-svn: 175562

excluding visibility bits.

Generic STO handling at the Target level.

The st_other field of the ELF symbol table is one
byte in size. The first 2 bytes are used for generic
visibility and are currently handled by llvm.

The other six bits are processor specific and need 
to be set at the target level.

A couple of notes:

The new static methods for accessing and setting the "other"
flags in include/llvm/MC/MCELF.h match the style guide
and not the other methods in the file. I don't like the
inconsistency, but feel I should follow the prescribed 
lowerUpper() convention.

STO_ value definitions are not specified in gnu land as 
consistently as the STT_ and STB_ fields. Probably because
the latter were defined in a standards doc and the former
defined partially in code. I have stuck with the full byte
definition of the flags.

Contributer: Zoran Jovanovic
llvm-svn: 175561

llvm-svn: 175560

llvm-svn: 175559

llvm-svn: 175558

llvm-svn: 175557

If a base object is at a 0 offset, RegionStoreManager may find a lazy
binding for the entire object, then try to attach a FieldRegion or
grandparent CXXBaseObjectRegion on top of that (skipping the intermediate
region). We now preserve as many layers of base object regions necessary
to make the types match.

<rdar://problem/13239840>

llvm-svn: 175556

In my previous commit:
"Merge a f32 bitcast of a v2i32 extractelt

A vectorized sitfp on doubles will get scalarized to a sequence of an
extract_element of <2 x i32>, a bitcast to f32 and a sitofp.
Due to the the extract_element, and the bitcast we will uneccessarily generate
moves between scalar and vector registers."

I added a pattern containing a copy_to_regclass. The copy_to_regclass is
actually not needed.

radar://13191881

llvm-svn: 175555

.. and a test that triggers it in valid albeit questionable code.

llvm-svn: 175554

Fix a bug in mayHaveSideEffects. Functions that do not return are now considered as instructions with side effects. 

rdar://13227456

llvm-svn: 175553

llvm-svn: 175552

- TestNamespace expected to fail due to PR-15302
- TestCPPBool and TestUnsignedTypes updated to handle GCC style debug information
- TestRvalueReferences expected fail due to GCC (4.7) not outputting rvalue-reference debug information
- TestDataFormatterStdVBool expected to fail due to PR-15301

llvm-svn: 175551

llvm-svn: 175550

character devices.

llvm-svn: 175549

Module::getExportedModules() so it can be reused.

llvm-svn: 175548

llvm-svn: 175547

llvm-svn: 175546

llvm-svn: 175545

    
autoconf and CMake flavours both updated to auto-generate files for use
in cpp11-migrate's LIT tests.

Auto-generated files are placed in the build directory under
test/cpp11-migrate/autogen. The directory structure past this point
mirrors the structure in the source directory under test/cpp11-migrate.
A lit.site.cfg is generated in test/cpp11-migrate/autogen to describe
the new test suite. When LIT runs, it runs the standard testsuite and
now also the auto-generated testsuite.

llvm-svn: 175544

Add i386 register support for the x86_64 RegisterContext plugin. This allows debugging a 32-bit inferior on 64-bit lldb/host.

llvm-svn: 175543

/dev/stdin as an input when stdin is connected to a tty, for example.

No test, because it's difficult to write a reasonably portable test
for this. /dev/stdin isn't a character device when stdin is redirected
from a file or connected to a pipe.

llvm-svn: 175542

When creating an allocation hint for a register pair, make sure the hint
for the physical register reference is still in the allocation order.

rdar://13240556

llvm-svn: 175541

Target implementations of getRegAllocationHints() should use the
provided allocation order, and they can never return hints outside the
order. This is already documented in TargetRegisterInfo.h.

<rdar://problem/13240556>

llvm-svn: 175540