- Kill is implicit when use and def registers are identical.
- Only virtual registers can differ.

Add a -verify-fast-regalloc to run the verifier before the fast allocator.

llvm-svn: 103797

argument, like "int $4", to not get an Assertion error.

llvm-svn: 103791

llvm-svn: 103790

used to replace a normal relocation, not a reference to a GOT entry.

llvm-svn: 103789

This adds extra security against using clobbered physregs, and it adds kill
markers to physreg uses.

llvm-svn: 103784

llvm-svn: 103778

control barriers, not memory ordering barriers.

llvm-svn: 103777

llvm-svn: 103776

isn't doing lazy streaming. This also fixes a missing doFinalization call.

llvm-svn: 103774

FunctionPassManager or regular PassManager.

llvm-svn: 103773

subgraph views.

llvm-svn: 103772

-filetype=obj test, and -filetype=obj leaks a few objects. Added a FIXME, we
need to sort out the ownership model for the various MC objects.

llvm-svn: 103769

Get rid of the bit twiddling to read / set OpActions and ValueTypeActions. The small saving in memory isn't worth the increase in runtime and code complexity in my opinion.

llvm-svn: 103768

 - This is a hack, but I can't decide the best place to handle this. Chris?

llvm-svn: 103765

llvm-svn: 103764

llvm-svn: 103760

Nothing uses this yet.

llvm-svn: 103757

llvm-svn: 103756

llvm-svn: 103755

 - The eliminates the last major algorithmic problem with MC.

llvm-svn: 103754

MC: Extend MCAsmLayout to explicitly track which fragments have been layed out, and enforce several invariants to LayoutFragment to ensure we only do layout in a sensible order.

llvm-svn: 103753

llvm-svn: 103752

llvm-svn: 103751

Also, elimminate MCAsmLayout::set*, which are no longer needed.

llvm-svn: 103750

llvm-svn: 103749

llvm-svn: 103748

This loop is quadratic in the capacity for a DenseMap:

  while(!map.empty())
    map.erase(map.begin());

Instead we now do a normal begin() - end() iteration followed by map.clear().
That also has the nice sideeffect of shrinking the map capacity on demand.

llvm-svn: 103747

Adding a v8i64 512-bit vector type. This will be used to model ARM NEON intrinsics which translate into a pair of vld / vst instructions that can load / store 8 consecutive 64-bit (D) registers.

llvm-svn: 103746

one was subject to double rounding in extreme cases.

llvm-svn: 103744

Eliminate use of magic numbers to access OpActions. It also has the effect of allowing more than 31 scalar value types. MAX_ALLOWED_VALUETYPE had already been updated to 64 a while back.

llvm-svn: 103743

Fix up LoadExtActions, TruncStoreActions, and IndexedModeActions representation and setter and getter's so they will continue to work if the number of scalar ValueType's exceeds 31.

llvm-svn: 103742

llvm-svn: 103739

llvm-svn: 103738

when they move instructions.

llvm-svn: 103737

llvm-svn: 103733

llvm-svn: 103731

Do not use those for Thumb1 functions.

llvm-svn: 103730

Patch by Dimitry Andric!

llvm-svn: 103727

use of it in MachineCSE.

llvm-svn: 103726

basic block.

llvm-svn: 103725