All insertf*/extractf* functions replaced with insert/extract since we have insertf and inserti forms.
Added lowering for INSERT_VECTOR_ELT / EXTRACT_VECTOR_ELT for 512-bit vectors.
Added lowering for EXTRACT/INSERT subvector for 512-bit vectors.
Added a test.

llvm-svn: 187491

The next patch will make use of RISBLG for codegen.

llvm-svn: 187490

llvm-svn: 187482

The heuristic that merges register pressure sets was bogus for ARM's S/D regs.

llvm-svn: 187479

llvm-svn: 187478

llvm-svn: 187477

Changed register names (and pointer keywords) to be lower case when using Intel X86 assembler syntax.

Patch by Richard Mitton.

llvm-svn: 187476

This fix is very lightweight. The same fix already existed for AddRec
but was missing for NAry expressions.

This is obviously an improvement and I'm unsure how to test compile
time problems.

Patch by Xiaoyi Guo!

llvm-svn: 187475

llvm-svn: 187472

Patch by Richard Mitton.

llvm-svn: 187471

For a testcase like the following:

 typedef unsigned long uint64_t;

 typedef struct {
   uint64_t lo;
   uint64_t hi;
 } blob128_t;

 void add_128_to_128(const blob128_t *in, blob128_t *res) {
   asm ("PAND %1, %0" : "+Q"(*res) : "Q"(*in));
 }

where we'll fail to allocate the register for the output constraint,
our matching input constraint will not find a register to match,
and could try to search past the end of the current operands array.

On the idea that we'd like to attempt to keep compilation going
to find more errors in the module, change the error cases when
we're visiting inline asm IR to return immediately and avoid
trying to create a node in the DAG. This leaves us with only
a single error message per inline asm instruction, but allows us
to safely keep going in the general case.

llvm-svn: 187470

No functionality change.

llvm-svn: 187469

No functionality change.

llvm-svn: 187468

One form would accept a vector of pointers, and the other did not.
Make both accept vectors of pointers, and add an assertion
for the number of elements.

llvm-svn: 187464

The unix one was returning no_such_file_or_directory, but the windows one
was return success.

Update the one one caller that was depending on the old behavior.

llvm-svn: 187463

llvm-svn: 187462

llvm-svn: 187459

llvm-svn: 187457

llvm-svn: 187456

This avoids constant folding bitcast/ptrtoint/inttoptr combinations
that have illegal bitcasts between differently sized address spaces.

llvm-svn: 187455

Apparently dragonegg uses it.

llvm-svn: 187454

In limited testing this seems to work. Caveat emptor.

llvm-svn: 187452

llvm-svn: 187448

Call into ComputeMaskedBits to figure out which bits are set on both add
operands and determine if the value is a power-of-two-or-zero or not.

llvm-svn: 187445

It will now only convert the arguments / return value and call
the underlying function if the types are able to be bitcasted.
This avoids using fp<->int conversions that would occur before.

llvm-svn: 187444

llvm-svn: 187443

llvm-svn: 187442

llvm-svn: 187441

turns "bal" into "bgezal".

llvm-svn: 187440

llvm-svn: 187439

llvm-svn: 187438

llvm-svn: 187437

When registers must be live throughout the scheduling region, increase
the limit for the register class. Once we exceed the original limit,
they will be spilled, and there's no point further reducing pressure.

This isn't a perfect heuristics but avoids a situation where the
scheduler could become trapped by trying to achieve the impossible.

llvm-svn: 187436

llvm-svn: 187435

register i7 as a live-in if current function's return address is taken.

This revision fixes PR16269.

llvm-svn: 187433

This is a follow up patch for r187390 to implement the parser for the
Windows-style command line. This should follow the rule as described
at http://msdn.microsoft.com/en-us/library/windows/desktop/17w5ykft(v=vs.85).aspx

Differential Revision: http://llvm-reviews.chandlerc.com/D1235

llvm-svn: 187430

- Thanks to Ilia Filippov for pointing out the inconsistency!

llvm-svn: 187424

llvm-svn: 187421

This patch implements parsing of mips FCC register operands. The example instructions have been added to test files.

llvm-svn: 187410

llvm-svn: 187406