patch to the front-end.  Radar 7662569.

llvm-svn: 126655

llvm-svn: 126574

llvm-svn: 126565

This follows the interface of getNodeAttributes.

llvm-svn: 126562

Add some DAGCombines for (adde 0, 0, glue), which are useful to optimize legalized code for large integer arithmetic.

1. Inform users of ADDEs with two 0 operands that it never sets carry
2. Fold other ADDs or ADDCs into the ADDE if possible

It would be neat if we could do the same thing for SETCC+ADD eventually, but we can't do that in target independent code.

llvm-svn: 126557

llvm-svn: 126526

llvm-svn: 126518

llvm-svn: 126488

llvm-svn: 126471

is possible to do better if the high bit is set in either KnownZero/KnownOne, but
in practice NumSignBits is always 1 when we are zero extending because nothing
is known about that register.

llvm-svn: 126465

actually larger.

llvm-svn: 126464

llvm-svn: 126463

New live ranges are assigned in long -> short order, but live ranges that have
been evicted at least once are deferred and assigned in short -> long order.

Also disable splitting and spilling for live ranges seen for the first time.

The intention is to create a realistic interference pattern from the heavy live
ranges before starting splitting and spilling around it.

llvm-svn: 126451

llvm-svn: 126450

Patch by Nathan Jeffords!

llvm-svn: 126425

Limit the folding of any_ext and sext  into the load operation to scalars.
Limit the active-bits trunc optimization to scalars.
Document vector trunc and vector sext in LangRef.

Similar to commit 126080 (for enabling zext).

llvm-svn: 126424

The problem was codegen guessing the wrong values and printing

	.section	.eh_frame,"aMS",@progbits,4

It is not clear at all if Codegen should try to guess, MC is the
one that should know the default flags.

llvm-svn: 126421

llvm-svn: 126397

registers at phis. This enables us to eliminate a lot of pointless zexts during
the DAGCombine phase. This fixes <rdar://problem/8760114>.

llvm-svn: 126380

llvm-svn: 126379

a block is visited before all of its predecessors.

llvm-svn: 126378

llvm-svn: 126377

and make the actual map private.

llvm-svn: 126376

allows for the information propagated across basic blocks to be merged at phis.

llvm-svn: 126375

register.

This avoids some silly stack slot shuffling when both sides of a copy get
spilled.

llvm-svn: 126353

Use DW_FORM_data2 for DW_AT_language and let users use DW_LANG_lo_user=0x8000 to DW_LANG_hi_user=0xffff range.

llvm-svn: 126339

No code will be inserted after the split point anyway.

llvm-svn: 126319

r124468.  Patch by Rafael Avila de Espindola!

llvm-svn: 126297

When a large live range is evicted, it will usually be split when it comes
around again. By deferring evicted live ranges, the splitting happens at a time
when the interference pattern is more realistic. This prevents repeated
splitting and evictions.

llvm-svn: 126282

llvm-svn: 126277

Use interval sizes instead of spill weights to determine if it is legal to evict
interference. A smaller interval can evict interference if all interfering live
ranges are larger.

Allow multiple interferences to be evicted as along as they are all larger than
the live range being allocated.

Spill weights are still used to select the preferred eviction candidate.

llvm-svn: 126276

This is based on the observation that long live ranges are more difficult to
allocate, so there is a better chance of solving the puzzle by handling the big
pieces first. The allocator will evict and split long alive ranges when they get
in the way.

RABasic is still using spill weights for its priority queue, so the interface to
the queue has been virtualized.

llvm-svn: 126259

llvm-svn: 126258

share entries. Add a DenseSet to MachineConstantPool for the MachineCPVs that
it owns.

This will hopefully fix the MC/ARM/elf-reloc-01.ll failure on the leaks bots.

llvm-svn: 126218

Apparently it's ok for multiple operands to "kill" the same register.
Fixes PR9237.

llvm-svn: 126190

llvm-svn: 126185

at phis. This enables us to eliminate a lot of pointless zexts during the DAGCombine
phase. This fixes <rdar://problem/8760114>.

llvm-svn: 126170

allows for the information propagated across basic blocks to be merged at phis.

llvm-svn: 126169

llvm-svn: 126163

llvm-svn: 126158