no functional change.

llvm-svn: 50921

case where there are multiple blocks with a large
number of common tail instructions more efficiently
(compile time optimization).

llvm-svn: 50916

llvm-svn: 50696

Teach branch folding pass about implicit_def instructions. Unfortunately we can't just eliminate them since register scavenger expects every register use to be defined. However, we can delete them when there are no intra-block uses.  Carefully removing some implicit def's which enable more blocks to be optimized away.

llvm-svn: 49461

llvm-svn: 47703

PR1909: Tail merging pass ran wild. It makes no sense to merge blocks in order to save a single instruction since a branch will be inserted for each BB.

llvm-svn: 47301

llvm-svn: 46930

llvm-svn: 46514

Make MachineInstr::getDesc return a reference instead
of a pointer, since it can never be null.

llvm-svn: 45695

that it is cheap and efficient to get.

Move a variety of predicates from TargetInstrInfo into 
TargetInstrDescriptor, which makes it much easier to query a predicate
when you don't have TII around.  Now you can use MI->getDesc()->isBranch()
instead of going through TII, and this is much more efficient anyway. Not
all of the predicates have been moved over yet.

Update old code that used MI->getInstrDescriptor()->Flags to use the
new predicates in many places.

llvm-svn: 45674

llvm-svn: 45667

llvm-svn: 45656

e.g. MO.isMBB() instead of MO.isMachineBasicBlock().  I don't plan on 
switching everything over, so new clients should just start using the 
shorter names.

Remove old long accessors, switching everything over to use the short
accessor: getMachineBasicBlock() -> getMBB(), 
getConstantPoolIndex() -> getIndex(), setMachineBasicBlock -> setMBB(), etc.

llvm-svn: 45464

llvm-svn: 45418

Improve branch folding by recgonizing that explict successor relationships impact the value of fall-through choices.

llvm-svn: 44785

llvm-svn: 43359

llvm-svn: 43353

llvm-svn: 43191

llvm-svn: 40757

llvm-svn: 38535

llvm-svn: 38516

_GLIBCXX_DEBUG.

llvm-svn: 37793

llvm-svn: 37633

llvm-svn: 37511

is too slow.

llvm-svn: 37509

llvm-svn: 37427

llvm-svn: 37408

llvm-svn: 37394

See test/CodeGen/X86/test-pic-jtbl.ll for a case where it works well;
shaves another 10K off our favorite benchmark.  I was hesitant about
this because of compile speed, but seems to do OK on a bootstrap.

llvm-svn: 37392

Do not remove empty landing pads (EH table needs to be updated)

llvm-svn: 37375

llvm-svn: 37355

matter until my last change).  Reenable tail merging by default.

llvm-svn: 37354

only one successor.

llvm-svn: 37324

Temporarily, this breaks CodeGen/Generic/2006-02-12-InsertLibraryCall.ll
by exposing an unrelated latent problem; working on that.

llvm-svn: 37323

When considering blocks with more than 2 predecessors, merge the block with
the largest number of matching insns, rather than the first block found.
Considering that 1 matching insn is enough to show a win for candidates that
already end with a branch.

llvm-svn: 37315

for a target-dependent default with a command-line override; this way
should be generally usable.

llvm-svn: 37285

llvm-svn: 37198

llvm-svn: 37089

failures on PPC (can happen only when prologue code is null)

llvm-svn: 36979

llvm-svn: 36966