llvm-svn: 40914

kill instruction #, and source register number (iff the value# is defined by a
copy).
- Now def instruction # is set for every value#, not just for copy defined ones.
- Update some outdated code related inactive live ranges.
- Kill info not yet set. That's next patch.

llvm-svn: 40913

Add a missing forward declaration.

llvm-svn: 40896

introduced by chandler's patch.

llvm-svn: 40864

llvm-svn: 40863

llvm-svn: 40854

llvm-svn: 40843

This is the patch to provide clean intrinsic function overloading support in LLVM. It cleans up the intrinsic definitions and generally smooths the process for more complicated intrinsic writing. It will be used by the upcoming atomic intrinsics as well as vector and float intrinsics in the future.

This also changes the syntax for llvm.bswap, llvm.part.set, llvm.part.select, and llvm.ct* intrinsics. They are automatically upgraded by both the LLVM ASM reader and the bitcode reader. The test cases have been updated, with special tests added to ensure the automatic upgrading is supported.

llvm-svn: 40807

llvm-svn: 40757

llvm-svn: 40748

llvm-svn: 40722

llvm-svn: 40712

simply specify them as results and let scheduledag handle them. That
is, instead of
SDOperand Flag = DAG.getTargetNode(Opc, MVT::i32, MVT::Flag, ...)
SDOperand Result = DAG.getCopyFromReg(Chain, X86::EAX, MVT::i32, Flag)

Just write:
SDOperand Result = DAG.getTargetNode(Opc, MVT::i32, MVT::i32, ...)

And let scheduledag emit the move from X86::EAX to a virtual register.

llvm-svn: 40710

llvm-svn: 40688

llvm-svn: 40682

New CallInst interface to address GLIBCXX_DEBUG errors caused by
indexing an empty std::vector.

Updates to all clients.

llvm-svn: 40660

llvm-svn: 40654

- Fixed an existing unexpanded tab.

llvm-svn: 40605

llvm-svn: 40598

for prettiness.

llvm-svn: 40593

still under discussion.

llvm-svn: 40549

llvm-svn: 40548

offsets. The SrcValueOffset values are the real offsets from the
SrcValue base pointers.

llvm-svn: 40534

Add a MachineFunction pass, which runs post register allocation, that turns subreg insert/extract instruction into register copies. This ensures correct code gen if the coalescer isn't able to remove all subreg instructions.

llvm-svn: 40521

llvm-svn: 40520

llvm-svn: 40516

llvm-svn: 40514

Fix infinite recursion for when extract_vector_elt is legal. Unfortunately no public targets use this code-path, so no test.

llvm-svn: 40510

llvm-svn: 40500

 - Split EH and debug infiormation
 - Make DwarfWriter more verbose in some cases

llvm-svn: 40481

llvm-svn: 40480

llvm-svn: 40443

when there are no uses. This fixes a dangling-pointer bug, where pointers to
deleted instructions were not removed from kills lists. More info here:
http://lists.cs.uiuc.edu/pipermail/llvmdev/2007-July/009749.html

llvm-svn: 40131

llvm-svn: 40123

what it thought it was doing.

llvm-svn: 40044

llvm-svn: 40022

alignment is equal to the stack alignment.

llvm-svn: 40004

llvm-svn: 39979

llvm-svn: 39921

llvm-svn: 39856