This reverts commit r159406. I noticed a performance regression so I'll back out for now.

llvm-svn: 159411

Before this patch in pic 32 bit code we would add the global base register
and not load from that address. This is a really old bug, but before the
introduction of the tls attributes we would never select initial exec for
pic code.

llvm-svn: 159409

llvm-svn: 159408

llvm-svn: 159407

The TargetInstrInfo::getNumMicroOps API does not change, but soon it
will be used by MachineScheduler. Now each subtarget can specify the
number of micro-ops per itinerary class. For ARM, this is currently
always dynamic (-1), because it is used for load/store multiple which
depends on the number of register operands.

Zero is now a valid number of micro-ops. This can be used for
nop pseudo-instructions or instructions that the hardware can squash
during dispatch.

llvm-svn: 159406

Corrected type for index of llvm.x86.avx2.gather.d.pd.256
  from 256-bit to 128-bit.
Corrected types for src|dst|mask of llvm.x86.avx2.gather.q.ps.256
  from 256-bit to 128-bit.

Support the following intrinsics:
  llvm.x86.avx2.gather.d.q, llvm.x86.avx2.gather.q.q
  llvm.x86.avx2.gather.d.q.256, llvm.x86.avx2.gather.q.q.256
  llvm.x86.avx2.gather.d.d, llvm.x86.avx2.gather.q.d
  llvm.x86.avx2.gather.d.d.256, llvm.x86.avx2.gather.q.d.256

llvm-svn: 159402

Clang has been getting along fine without this for quite some time.

llvm-svn: 159400

only used in the Clang tree, but it seems reasonable to support.

llvm-svn: 159399

the assert reported in PR13228!

llvm-svn: 159393

While at it, merge 2 tests and FileCheckize them

llvm-svn: 159388

llvm-svn: 159385

llvm-svn: 159384

add a new @llvm.donothing intrinsic that, well, does nothing, and teach CodeGen to ignore calls to it

llvm-svn: 159383

Teach vector legalization how to honor Promote for int to float
conversions. The code checking whether to promote the operation knew
to look at the operand, but the actual promotion code didn't. This
fixes that. The operand is promoted up via [zs]ext.

rdar://11762659

llvm-svn: 159378

the comment per code review feedback.

llvm-svn: 159376

llvm-svn: 159374

llvm-svn: 159372

This way the generated GCC builtin to LLVM intrinsic converter
actually works.

llvm-svn: 159370

llvm-svn: 159367

This patch was reviewed in the llvm-commits list by Jim Grosbach.

llvm-svn: 159364

 - recognize C++ new(std::nothrow) friends
 - ignore ExtractElement and ExtractValue instructions in size/offset analysis (all easy cases are probably folded away before we get here)
 - also recognize realloc as noalias

llvm-svn: 159356

make LazyValueInfo analyze the default case of switch statements (we know that in the default branch the value cannot be any of the switch cases)

llvm-svn: 159353

llvm-svn: 159352

Nothing in here makes use of the virtuality.

llvm-svn: 159349

[asan] set a hard limit on the number of instructions instrumented pear each BB. This is (hopefully temporary) workaround for PR13225 

llvm-svn: 159344

llvm-svn: 159340

llvm-svn: 159334

a dedicated helper function. This will enable re-using the same logic
for Clang's lit setup, etc.

llvm-svn: 159333

When both a load/store and its address computation are being vectorized, it can
happen that the address-computation vectorization destroys SCEV's ability
to analyize the relative pointer offsets. As a result (like with the aliasing
analysis info), we need to precompute the necessary information prior to
instruction fusing.

This was found during stress testing (running through the test suite with a very
low required chain length); unfortunately, I don't have a small test case.

llvm-svn: 159332

A shuffle mask will always be a constant, but I did not realize that
when I originally wrote the code.

llvm-svn: 159331

The original algorithm only used recursive pair fusion of equal-length
types. This is now extended to allow pairing of any types that share
the same underlying scalar type. Because we would still generally
prefer the 2^n-length types, those are formed first. Then a second
set of iterations form the non-2^n-length types.

Also, a call to SimplifyInstructionsInBlock has been added after each
pairing iteration. This takes care of DCE (and a few other things)
that make the following iterations execute somewhat faster. For the
same reason, some of the simple shuffle-combination cases are now
handled internally.

There is some additional refactoring work to be done, but I've had
many requests for this feature, so additional refactoring will come
soon in future commits (as will additional test cases).

llvm-svn: 159330

Maintaining this kind of checking in different places is dangerous, extending
Instruction::isSameOperationAs consolidates this logic into one place. Here
I've added an optional flags parameter and two flags that are important for
vectorization: CompareIgnoringAlignment and CompareUsingScalarTypes.

llvm-svn: 159329

llvm-svn: 159328

llvm-svn: 159327

following description in the gnu sources:

    Print $0 if operand is zero otherwise print the op normally.

llvm-svn: 159324

make LVI::getEdgeValue() always intersect the constraints of the edge with the range of the block. Previously it was only performing the intersection for a few cases, thus losing precision

llvm-svn: 159320

llvm-svn: 159319

MDNode.

llvm-svn: 159317

llvm-svn: 159316

llvm-svn: 159314