disassembler never recognizes InitReg instructions.

llvm-svn: 97017

llvm-svn: 97013

Machine instruction selection is much happier when operands are in virtual
registers.

llvm-svn: 97012

llvm-svn: 97011

argument is non-null, pass it along to PHITranslateSubExpr so that it can
prefer using existing values that dominate the PredBB, instead of just
blindly picking the first equivalent value that it finds on a uselist.
Also when the DominatorTree is specified, have PHITranslateValue filter
out any result that does not dominate the PredBB.  This is basically just
refactoring the check that used to be in GetAvailablePHITranslatedSubExpr
and also in GVN.

Despite my initial expectations, this change does not affect the results
of GVN for any testcases that I could find, but it should help compile time.
Before this change, if PHITranslateSubExpr picked a value that does not
dominate, PHITranslateWithInsertion would then insert a new value, which GVN
would later determine to be redundant and would replace.  By picking a good
value to begin with, we save GVN the extra work of inserting and then
replacing a new value.

llvm-svn: 97010

instead of %AL/%AH.

llvm-svn: 97006

single use.

llvm-svn: 97003

creating a new node then replacing uses.

llvm-svn: 97000

llvm-svn: 96995

Previously, LiveIntervalAnalysis would infer phi joins by looking for multiply
defined registers. That doesn't work if the phi join is implicitly defined in
all but one of the predecessors.

llvm-svn: 96994

llvm-svn: 96990

With the compiler changed to use EmitCodeAlignment() it does change the
functionality.  But X86 assembly code assembled with llvm-mc does not change
its output.  For that we will eventually change the assembler frontend to
detect a '.align x, 0x90' when used in a section that 'hasInstructions' and use
EmitCodeAlignment, but will wait until we have better target hooks.

llvm-svn: 96988

llvm-svn: 96983

llvm-svn: 96981

three or four registers and VLD2 (multiple two-element structures) which loads
memory into two double-spaced registers.

A8.6.307 & A8.6.310

llvm-svn: 96980

llvm-svn: 96977

llvm-svn: 96975

disables load folding at -O0.

llvm-svn: 96973

no id's would cause early exit allowing IsLegalToFold to return true
instead of false, producing a cyclic dag.

This was striking the new isel because it isn't using SelectNodeTo yet,
which theoretically is just an optimization.

llvm-svn: 96972

llvm-svn: 96971

The MicroBlaze is a highly configurable 32-bit soft-microprocessor for
use on Xilinx FPGAs. For more information see:
http://www.xilinx.com/tools/microblaze.htm
http://en.wikipedia.org/wiki/MicroBlaze

The current LLVM MicroBlaze backend generates assembly which can be
compiled using the an appropriate binutils assembler.

llvm-svn: 96969

segment.

llvm-svn: 96967

so that it doesn't break them when the code generator starts using it.

llvm-svn: 96966

llvm-svn: 96965

llvm-svn: 96964

to be aligned with optimal nops.  This patch does not change any functionality
and when the compiler is changed to use EmitCodeAlignment() it should also not
change the resulting output.  Once the compiler change is made and everything
looks good the next patch with the table of optimal X86 nops will be added to
WriteNopData() changing the output.  There are many FIXMEs in this patch which
will be removed when we have better target hooks (coming soon I hear).

llvm-svn: 96963

llvm-svn: 96960

the examples shared to make sure the shared library keeps working.

llvm-svn: 96959

Speed up cycle checking significantly by caching results.

llvm-svn: 96956

handle NaN properly.

Do (X une Y) ? X : Y  -> X if one of X and Y is not zero.

llvm-svn: 96955

llvm-svn: 96954

getelementptr. Despite only doing so in the case where x is a known
array object and c can be converted to an index within range, this
could still be invalid if c is actually the address of an object
allocated outside of LLVM. Also, SCEVExpander, the original motivation
for this code, has since been improved to avoid inttoptr+ptroint in
more cases.

llvm-svn: 96950

x86 and x86_64 on UNIX systems. Only OS X 10.6.2 (x86_64) and 32bit CentOS 5.2
with gcc 4.1.2 were tested. ARM UNIX build triggered failure motivating this
modification, as it seems that the ARM ABI does not support _Unwind_GetIP(...),
_Unwind_SetGR(...), and _Unwind_SetIP(...). From doing a quick browse of:
http://infocenter.arm.com/help/topic/com.arm.doc.ihi0038a/IHI0038A_ehabi.pdf,
it seems as if all other exception related apis are supported. Looks like
the port can be done to ARM. Thanks to Xerxes Rånby <xerxes@zafena.se> for
pointing out this error.

llvm-svn: 96949

llvm-svn: 96948

llvm-svn: 96944

llvm-svn: 96943

llvm-svn: 96942

llvm-svn: 96938

llvm-svn: 96936

capable compilers (which could be llvm-gcc or clang).

llvm-svn: 96935