llvm-svn: 106796

- Fix a small VEX encoding issue.
- Move compare instructions to their appropriate place.

llvm-svn: 106787

address requires a register or secondary load to compute
(most PIC modes).  This improves "g" constraint handling.  8015842.

The test from 2007 is attempting to test the fix for PR1761,
but since -relocation-model=static doesn't work on Darwin
x86-64, it was not testing what it was supposed to be testing
and was passing erroneously.  Fixed to use Linux x86-64.

llvm-svn: 106779

llvm-svn: 106775

llvm-svn: 106770

form so they can be narrowed to 16-bit instructions.

llvm-svn: 106762

llvm-svn: 106746

rdar://8013734

llvm-svn: 106725

llvm-svn: 106724

llvm-svn: 106723

Patch by Ben Ransford!

llvm-svn: 106722

bt instruction, which was exposed by r106263.

llvm-svn: 106718

llvm-svn: 106717

The ValueMapper used by various cloning utility maps MDNodes also.

llvm-svn: 106706

llvm-svn: 106705

llvm-svn: 106702

void t(int *cp0, int *cp1, int *dp, int fmd) {
  int c0, c1, d0, d1, d2, d3;
  c0 = (*cp0++ & 0xffff) | ((*cp1++ << 16) & 0xffff0000);
  c1 = (*cp0++ & 0xffff) | ((*cp1++ << 16) & 0xffff0000);
  /* ... */
}

It code gens into something pretty bad. But with this change (analogous to the
X86 back-end), it will use ldm and generate few instructions.

llvm-svn: 106693

llvm-svn: 106683

Add tests for different AVX cmp opcodes, also teach the x86 asm parser to understand the vcmp instruction

llvm-svn: 106678

llvm-svn: 106677

llvm-svn: 106672

llvm-svn: 106671

branch turns out to be ARM-to-Thumb or vice versa
the linker cannot resolve this.  8120438.

If this optimization is going to be useful we probably
need a compiler flag "assume callees are same architecture"
or something like that.

llvm-svn: 106662

Revert r106263, "Fold the ShrinkDemandedOps pass into the regular DAGCombiner pass,"... it was causing both 'file' (with clang) and 176.gcc (with llvm-gcc) to be miscompiled.

llvm-svn: 106634

to using that.

llvm-svn: 106633

MEMBARRIER fences aren't necessary for ARM. Tell the combiner to fold them
away.

llvm-svn: 106631

llvm-svn: 106621

Revert r106066, "Create a more targeted fix for not sinking instructions into a range where it"... it causes bzip2 to be miscompiled by Clang.

Conflicts:

	lib/CodeGen/MachineSink.cpp

llvm-svn: 106614

llvm-svn: 106600

testcases this time.

llvm-svn: 106593

llvm-svn: 106588

llvm-svn: 106586

Radar 8031193.

llvm-svn: 106582

llvm-svn: 106574

llvm-svn: 106557

llvm-svn: 106556

llvm-svn: 106542

llvm-svn: 106517

llvm-svn: 106513

but it will cover uses of blockaddress that are actually in a function.

llvm-svn: 106502