llvm-svn: 85556

llvm-svn: 85536

*ISelDAGToDAG.cpp to being regular code in SelectionDAGISel.cpp.

llvm-svn: 85530

bunch of associated comments, because it doesn't have anything to do
with DAGs or scheduling. This is another step in decoupling MachineInstr
emitting from scheduling.

llvm-svn: 85517

llvm-svn: 85436

chains have no users, they can't be predecessors of the condition.

llvm-svn: 85394

recursive to avoid consuming extraordinary amounts of stack space
when processing tall graphs.

llvm-svn: 85369

llvm-svn: 85361

MachineLICM and other things which run before LiveVariables is run.

llvm-svn: 85360

llvm-svn: 85351

llvm-svn: 85325

llvm-svn: 85323

llvm-svn: 85296

Do away with addLegalFPImmediate. Add a target hook isFPImmLegal which returns true if the fp immediate can be natively codegened by target.

llvm-svn: 85281

(assembler,asmprinter, bc reader+writer) and document it.  Codegen
currently aborts on it.

llvm-svn: 85274

thread safe either.

llvm-svn: 85253

do anything than return "I don't know" at the moment.

llvm-svn: 85189

Remove LowerAllocations pass.
Update some more passes to treate free calls just like they were treating FreeInst.

llvm-svn: 85176

VISIBILITY_HIDDEN removal.

llvm-svn: 85043

Chris claims we should never have visibility_hidden inside any .cpp file but
that's still not true even after this commit.

llvm-svn: 85042

the scale overflows pointer-sized arithmetic. This fixes PR5281.

llvm-svn: 84954

llvm-svn: 84806

transform.

llvm-svn: 84683

stack slots and giving them different PseudoSourceValue's did not fix the
problem of post-alloc scheduling miscompiling llvm itself.
- Apply Dan's conservative workaround by assuming any non fixed stack slots can
alias other memory locations. This means a load from spill slot #1 cannot 
move above a store of spill slot #2. 
- Enable post-alloc scheduling for x86 at optimization leverl Default and above.

llvm-svn: 84424

llvm-svn: 84411

llvm-svn: 84321

necessarily fixed. Only those will negative frame indices are "fixed."

llvm-svn: 84315

llvm-svn: 84311

llvm-svn: 84300

llvm-svn: 84299

llvm-svn: 84279

llvm-svn: 84247

llvm-svn: 84193

so get rid of eh.selector.i64 and rename eh.selector.i32 to eh.selector.
Likewise for eh.typeid.for.  This aligns us with gcc, which always uses a
32 bit value for the selector on all platforms.  My understanding is that
the register allocator used to assert if the selector intrinsic size didn't
match the pointer size, and this was the reason for introducing the two
variants.  However my testing shows that this is no longer the case (I
fixed some bugs in selector lowering yesterday, and some more today in the
fastisel path; these might have caused the original problems).

llvm-svn: 84106

s/DebugLoc.InlinedLoc/DebugLoc.InlinedAtLoc/g

llvm-svn: 84054

truncating an SDValue (depending on whether the target
type is bigger or smaller than the value's type); or zero
extending or truncating it.  Use it in a few places (this
seems to be a popular operation, but I only modified cases
of it in SelectionDAGBuild).  In particular, the eh_selector
lowering was doing this wrong due to a repeated rather than
inverted test, fixed with this change.

llvm-svn: 84027

llvm-svn: 83921

compile time penalty on gnugo, the worst case in MultiSource, is down to
about 2.5% from 30%

llvm-svn: 83824

into MachineInstrs. This is mostly just moving the code from
ScheduleDAGSDNodesEmit.cpp into a new class. This decouples MachineInstr
emitting from scheduling.

llvm-svn: 83699

since it won't do any folding. This will help avoid some inconvenient
casting.

llvm-svn: 83698