Commits · 6d95a8521f6ebaee61091dbe07c23c8f88a7f52c · Roger Ferrer / llvm-epi-0.8 · GitLab

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Sep 23, 2018
- [X86] Remove unnecessary WriteRotate override. NFCI. · 6d95a852
  Simon Pilgrim authored Sep 23, 2018
  6d95a852
- Fix line ending mismatches. NFCI. · e7938423
  Simon Pilgrim authored Sep 23, 2018
  e7938423
- [X86] ROR*mCL instruction models should match ROL*mCL etc. · 9202c9fb
  Simon Pilgrim authored Sep 23, 2018
  9202c9fb
- [Aarch64] Fix memcpy that was copying 4x too many bytes · b3478fcf
  Benjamin Kramer authored Sep 23, 2018
  b3478fcf
- [DAGCombiner][x86] extend decompose of integer multiply into shift/add with negation · 00279469
  Sanjay Patel authored Sep 23, 2018
  00279469
- [X86] Added missing RCL/RCR schedule overrides to the generic SNB model · 19952add
  Simon Pilgrim authored Sep 23, 2018
  19952add
- [X86] Remove unnecessary WriteRotate overrides. NFCI. · 22d31c5e
  Simon Pilgrim authored Sep 23, 2018
  22d31c5e
- [X86] Move RORX instructions back to WriteShift schedule class · 4b500860
  Simon Pilgrim authored Sep 23, 2018
  4b500860
- [X86] Add WriteRotate schedule class, splitting off from WriteShift. · 5f9d9120
  Simon Pilgrim authored Sep 23, 2018
  5f9d9120
- [X86] Add isel pattern for (v8i16 (sext (v8i1))) with DQI and no BWI. · c296436a
  Craig Topper authored Sep 23, 2018
  c296436a
- [X86] Fix a few typos in comments. · 3e0b4b0e
  Craig Topper authored Sep 23, 2018
  3e0b4b0e
- [AArch64] Support adding X[8-15,18] registers as CSRs. · 6c47c625
  Tri Vo authored Sep 22, 2018
  6c47c625
Sep 22, 2018
- [mips] Provide more detailed description for MIPS targets. NFC · 7c9648ff
  Simon Atanasyan authored Sep 22, 2018
  7c9648ff
- [mips] Remove obsoleted "experimental" tag from MIPS 64-bit targets. NFC · 1ba42ab7
  Simon Atanasyan authored Sep 22, 2018
  1ba42ab7
- [X86] Fix inline expansion for memset in x32 · 082e04c6
  Craig Topper authored Sep 22, 2018
  082e04c6
- [X86] Fold (movmsk (setne (and X, (1 << C)), 0)) -> (movmsk (X << C)) for vXi8 vectors. · 9995760d
  Craig Topper authored Sep 22, 2018
  9995760d
- [X86] Teach fast isel to use MOV32ri64 for loading an unsigned 32 immediate into a 64-bit register. · ecdab03d
  Craig Topper authored Sep 21, 2018
  ecdab03d
Sep 21, 2018
- [WebAssembly] Simplified selecting asmmatcher stack instructions. · e0403f13
  Wouter van Oortmerssen authored Sep 21, 2018
  e0403f13
- [Hexagon] Avoid functions with exception handling in HexagonConstExtenders · 5805def9
  Krzysztof Parzyszek authored Sep 21, 2018
  5805def9
- revert changes from r342722 · 0807e949
  Sameer Sahasrabuddhe authored Sep 21, 2018
  0807e949
- AArch64FastISel: Abort if we failed to select operand of intrinsic · c0ef7860
  Matthias Braun authored Sep 21, 2018
  c0ef7860
- [X86][Sched] Add zero idiom sched data to the SNB model. · 8171bd8e
  Clement Courbet authored Sep 21, 2018
  8171bd8e
- [X86][BtVer2] Fix latency and resource cycles of AVX 256-bit zero-idioms. · 4cd5cf9f
  Andrea Di Biagio authored Sep 21, 2018
  4cd5cf9f
- [AMDGPU] lower-switch in preISel as a workaround for legacy DA · 2de7653f
  Sameer Sahasrabuddhe authored Sep 21, 2018
  2de7653f
- [AMDGPU] Divergence driven instruction selection. Part 1. · 36617f01
  Alexander Timofeev authored Sep 21, 2018
  36617f01
- bpf: check illegal usage of XADD insn return value · 150ca514
  Yonghong Song authored Sep 20, 2018
  150ca514
- [WebAssembly] Add V128 value type to binary format · 6f21a136
  Thomas Lively authored Sep 20, 2018
  6f21a136
Sep 20, 2018
- [SelectionDAG] replace duplicated peekThroughBitcast helper functions; NFCI · 8a1227cc
  Sanjay Patel authored Sep 20, 2018
  8a1227cc
- [X86][SSE] Remove UNPCKL(SHUFFLE)->UNPCKH custom combine · 3e2de767
  Simon Pilgrim authored Sep 20, 2018
  3e2de767
- [X86][SSE] Remove PSHUFLW/PSHUFHW combineRedundantHalfShuffle combine · 46c1dcb1
  Simon Pilgrim authored Sep 20, 2018
  46c1dcb1
- [RISCV][MC] Modify evaluateConstantImm interface to allow reuse from addExpr · 96ed75d0
  Alex Bradbury authored Sep 20, 2018
  96ed75d0
- [RISCV][MC] Improve parsing of jal/j operands · 226f3ef5
  Alex Bradbury authored Sep 20, 2018
  226f3ef5
- Fix for bug 34002 - label generated before it block is finalized. Differential... · ec1efe4e
  Maya Madhavan authored Sep 20, 2018
  ec1efe4e
- [PowerPC] Fix the assert of combineBVOfConsecutiveLoads when element num is 1 · cae9425a
  QingShan Zhang authored Sep 20, 2018
  cae9425a
- [WebAssembly] Renumber SIMD ops · f45de47c
  Thomas Lively authored Sep 20, 2018
  f45de47c
Sep 19, 2018
- AArch64: Add FuseCryptoEOR fusion rules · 28d6a4ac
  Matthias Braun authored Sep 19, 2018
  28d6a4ac
- [ARM] Adjust the feature set for Exynos · 8a6973d6
  Evandro Menezes authored Sep 19, 2018
  8a6973d6
- [ARM] Refactor Exynos feature set (NFC) · c62ab611
  Evandro Menezes authored Sep 19, 2018
  c62ab611
- [X86] Handle COPYs of physregs better (regalloc hints) · 2d0f20cc
  Simon Pilgrim authored Sep 19, 2018
  2d0f20cc
- [x86] change names of vector splitting helper functions; NFC · 1a1c0ee5
  Sanjay Patel authored Sep 19, 2018
  1a1c0ee5