In this case, the value need to be available at the load index instead of the
normal use index.

llvm-svn: 127167

llvm-svn: 127163

This allows LLVM IR using ptx_kernel or ptx_device calling
conventions to be properly printed when emitted in text form.

llvm-svn: 127157

then the result could go either way. If it's provably positive then so is the
srem. Fixes PR9343 #7!

llvm-svn: 127146

llvm-svn: 127140

thing for variables.

llvm-svn: 127138

llvm-svn: 127131

the value splatted into every element. Extend this to getTrue and getFalse which
by providing new overloads that take Types that are either i1 or <N x i1>. Use
it in InstCombine to add vector support to some code, fixing PR8469!

llvm-svn: 127116

llvm-svn: 127114

Disable a couple of experimental heuristics to get the best results from the current implementation of -pre-RA-sched=list-ilp.

llvm-svn: 127113

ARM assembler stuff is crazy: for .setfp positive values of offset corresponds to "add" instruction, not to "sub" as in .pad case

llvm-svn: 127106

In Thumb1 mode the constant might be materialized via the load from constpool. Emit unwinding information in case when this load from constpool is used to change the stack pointer in the prologue.

llvm-svn: 127105

Implement frame unwinding information emission for Thumb1. Not finished yet because there is no way given the constpool index to examine the actual entry: the reason is clones inserted by constant island pass, which are not tracked at all! The only connection is done during asmprinting time via magic label names which is really gross and needs to be eventually fixed.

llvm-svn: 127104

llvm-svn: 127103

llvm-svn: 127102

This is just very first approximation how the stuff should be done
(e.g. ARM-only for now). More to follow.

llvm-svn: 127101

llvm-svn: 127099

llvm-svn: 127098

The coalescer can in very rare cases leave too large live intervals around after
rematerializing cheap-as-a-move instructions.

Linear scan doesn't really care, but live range splitting gets very confused
when a live range is killed by a ghost instruction.

I will fix this properly in the coalescer after 2.9 branches.

llvm-svn: 127096

llvm-svn: 127090

InstCombine: We know the number of items initially added to the worklist map, reserve space early to avoid rehashing.

llvm-svn: 127089

llvm-svn: 127084

llvm-svn: 127075

llvm-svn: 127071

the percentage of time spent in CodeGenPrepare when llcing 403.gcc from 12.6% to
1.8% of total llc time.

llvm-svn: 127069

llvm-svn: 127068

regs. This is the only change in this checkin that may affects the
default scheduler. With better register tracking and heuristics, it
doesn't make sense to artificially lower the register limit so much.

Added -sched-high-latency-cycles and X86InstrInfo::isHighLatencyDef to
give the scheduler a way to account for div and sqrt on targets that
don't have an itinerary. It is currently defaults to 10 (the actual
number doesn't matter much), but only takes effect on non-default
schedulers: list-hybrid and list-ilp.

Added several heuristics that can be individually disabled for the
non-default sched=list-ilp mode. This helps us determine how much
better we can do on a given benchmark than the default
scheduler. Certain compute intensive loops run much faster in this
mode with the right set of heuristics, and it doesn't seem to have
much negative impact elsewhere. Not all of the heuristics are needed,
but we still need to experiment to decide which should be disabled by
default for sched=list-ilp.

llvm-svn: 127067

llvm-svn: 127065

possible. This goes into instcombine and instsimplify because instsimplify
doesn't need to check hasOneUse since it returns (almost exclusively) constants.

This fixes PR9343 #4 #5 and #8!

llvm-svn: 127064

true/false or "icmp slt/sge Y, 0".

llvm-svn: 127063

The global cost is the sum of block frequencies for spill code that must be
inserted because preferences weren't met.

llvm-svn: 127062

This simplifies the code and makes it faster too.

The interference patterns are saved for each candidate register. It will be
reused for actually executing the split. Work in progress.

llvm-svn: 127054

llvm-svn: 127049

Patch by Johannes Schaub!

Fixes PR8548

llvm-svn: 127047

llvm-svn: 127043

llvm-svn: 127040

llvm-svn: 127038

It gives better results. Sometimes, a live range can be large and still have
high spill weight. Such a range should not be spilled.

llvm-svn: 127036

llvm-svn: 127034

Expands register/immediate pairs when the immediate is too large to fit in 16-bit field. Patch by Akira Hatanaka

llvm-svn: 127032