- Jun 18, 2010
-
-
Dan Gohman authored
switch from this: if (TimePassesIsEnabled) { NamedRegionTimer T(Name, GroupName); do_something(); } else { do_something(); // duplicate the code, this time without a timer! } to this: { NamedRegionTimer T(Name, GroupName, TimePassesIsEnabled); do_something(); } llvm-svn: 106285
-
Dan Gohman authored
the old one. llvm-svn: 106284
-
Dan Gohman authored
Don't replace the old DbgInfo with a new one when clear() on the old one is sufficient. llvm-svn: 106283
-
Dan Gohman authored
SDNode *, since it doesn't care about the ResNo value. llvm-svn: 106282
-
Dan Gohman authored
is more consistent with the ConstantInt API. llvm-svn: 106281
-
Dan Gohman authored
llvm-svn: 106280
-
Dan Gohman authored
llvm-svn: 106279
-
Dan Gohman authored
llvm-svn: 106278
-
Eric Christopher authored
llvm-svn: 106273
-
Dan Gohman authored
Fix from Russel Power in PR7284. llvm-svn: 106271
-
Dan Gohman authored
This fixes PR7333. llvm-svn: 106267
-
Dan Gohman authored
to track a node over CSE events. This fixes PR7368. llvm-svn: 106266
-
Bruno Cardoso Lopes authored
llvm-svn: 106264
-
Dan Gohman authored
which is faster, simpler, and less surprising. llvm-svn: 106263
-
Dan Gohman authored
llvm-svn: 106260
-
Dan Gohman authored
llvm-svn: 106256
-
Dan Gohman authored
llvm-svn: 106254
-
Bruno Cardoso Lopes authored
be done incrementally and intermixed with the adding of more AVX instructions. This is a first step in that direction llvm-svn: 106251
-
Stuart Hastings authored
addresses a longstanding deficiency noted in many FIXMEs scattered across all the targets. This effectively moves the problem up one level, replacing eleven FIXMEs in the targets with eight FIXMEs in CodeGen, plus one path through FastISel where we actually supply a DebugLoc, fixing Radar 7421831. llvm-svn: 106243
-
- Jun 17, 2010
-
-
Jim Grosbach authored
for correctness' sake, it should be there. llvm-svn: 106229
-
Jim Grosbach authored
for the moment. The implementation of the libcall will follow. Currently, the llvm-gcc knows when the intrinsics can be correctly handled by the back end and only generates them in those cases, issuing libcalls directly otherwise. That's too much coupling. The intrinsics should always be generated and the back end decide how to handle them, be it with a libcall, inline code, or whatever. This patch is a step in that direction. rdar://8097623 llvm-svn: 106227
-
Jim Grosbach authored
ISD::MEMBARRIER. v7 and v7 ARM mode continue to use the custom lowering. llvm-svn: 106204
-
Jim Grosbach authored
sets the legalize action to Expand. llvm-svn: 106203
-
Jim Grosbach authored
previously would result in 'cannot yet select' errors. llvm-svn: 106199
-
Jason Molenda authored
DW_OP_breg[0..31] to Dwarf.h. Add "DW_" prefix to the llvm::dwarf::*String methods which did not already have them in Dwarf.cpp. llvm-svn: 106197
-
Eric Christopher authored
TLVP: movl _a@TLVP, %eax Daniel: Please review if you get a chance. llvm-svn: 106194
-
Eric Christopher authored
llvm-svn: 106191
-
Jim Grosbach authored
llvm-svn: 106173
-
Jim Grosbach authored
llvm-svn: 106164
-
Jakob Stoklund Olesen authored
This is before LiveVariables anyway, where these kill flags are recalculated. llvm-svn: 106157
-
- Jun 16, 2010
-
-
Bob Wilson authored
now, so there's no need to disable them. llvm-svn: 106155
-
Eric Christopher authored
llvm-svn: 106154
-
Jakob Stoklund Olesen authored
LiveVariableAnalysis was a bit picky about a register only being redefined once, but that really isn't necessary. Here is an example of chained INSERT_SUBREGs that we can handle now: 68 %reg1040<def> = INSERT_SUBREG %reg1040, %reg1028<kill>, 14 register: %reg1040 +[70,134:0) 76 %reg1040<def> = INSERT_SUBREG %reg1040, %reg1029<kill>, 13 register: %reg1040 replace range with [70,78:1) RESULT: %reg1040,0.000000e+00 = [70,78:1)[78,134:0) 0@78-(134) 1@70-(78) 84 %reg1040<def> = INSERT_SUBREG %reg1040, %reg1030<kill>, 12 register: %reg1040 replace range with [78,86:2) RESULT: %reg1040,0.000000e+00 = [70,78:1)[78,86:2)[86,134:0) 0@86-(134) 1@70-(78) 2@78-(86) 92 %reg1040<def> = INSERT_SUBREG %reg1040, %reg1031<kill>, 11 register: %reg1040 replace range with [86,94:3) RESULT: %reg1040,0.000000e+00 = [70,78:1)[78,86:2)[86,94:3)[94,134:0) 0@94-(134) 1@70-(78) 2@78-(86) 3@86-(94) rdar://problem/8096390 llvm-svn: 106152
-
Jim Grosbach authored
when iterating through instructions. Yet more work for rdar://7797940 llvm-svn: 106149
-
Daniel Dunbar authored
MC/Mach-O: Rewrite atom association to be a final pass we do in Finish(), instead of tracking as part of emission. - This allows sharing more code with the MCObjectStreamer. llvm-svn: 106143
-
Daniel Dunbar authored
llvm-svn: 106142
-
Daniel Dunbar authored
llvm-svn: 106141
-
Daniel Dunbar authored
object file format writers. llvm-svn: 106140
-
Rafael Espindola authored
convention with a new call with a different calling convention. llvm-svn: 106134
-
Jim Grosbach authored
llvm-svn: 106126
-