llvm-svn: 27158

manner that the LowerSwitch LLVM to LLVM pass does: emitting a binary
search tree of basic blocks.  The new approach has several advantages:
it is faster, it generates significantly smaller code in many cases, and
it paves the way for implementing dense switch tables as a jump table by
handling switches directly in the instruction selector.

This functionality is currently only enabled on x86, but should be safe for
every target.  In anticipation of making it the default, the cfg is now
properly updated in the x86, ppc, and sparc select lowering code.

llvm-svn: 27156

llvm-svn: 27155

llvm-svn: 27154

llvm-svn: 27153

llvm-svn: 27152

llvm-svn: 27151

llvm-svn: 27150

llvm-svn: 27149

llvm-svn: 27148

llvm-svn: 27147

llvm-svn: 27146

llvm-svn: 27145

llvm-svn: 27144

non-predicate altivec compare intrinsics.

llvm-svn: 27143

intrinsics.

llvm-svn: 27142

llvm-svn: 27141

intrinsics.

llvm-svn: 27140

llvm-svn: 27139

llvm-svn: 27138

llvm-svn: 27137

llvm-svn: 27136

CodeGen/PowerPC/eqv-andc-orc-nor.ll:VNOR/VANDC

llvm-svn: 27135

llvm-svn: 27134

llvm-svn: 27133

llvm-svn: 27132

false

llvm-svn: 27131

llvm-svn: 27130

llvm-svn: 27129

llvm-svn: 27128

llvm-svn: 27127

llvm-svn: 27126

llvm-svn: 27125

llvm-svn: 27124

llvm-svn: 27123

llvm-svn: 27122

llvm-svn: 27121

llvm-svn: 27120

series of unpack and interleave ops.

llvm-svn: 27119

llvm-svn: 27118