llvm-svn: 100399

When a target instruction wants to set target-specific flags, it should simply
set bits in the TSFlags bit vector defined in the Instruction TableGen class.

This works well because TableGen resolves member references late:

class I : Instruction {
  AddrMode AM = AddrModeNone;
  let TSFlags{3-0} = AM.Value;
}

let AM = AddrMode4 in
def ADD : I;

TSFlags gets the expected bits from AddrMode4 in this example.

llvm-svn: 100384

"asm printering" happens through MCStreamer.  This also 
Streamerizes PIC16 debug info, which escaped my attention.

This removes a leak from LLVMTargetMachine of the 'legacy'
output stream.

llvm-svn: 100327

don't have mcstreamer support for yet.

llvm-svn: 100319

implementations to use EmitRawText instead of writing
directly to "O".

llvm-svn: 100318

raw_ostream to print to.

llvm-svn: 100313

member of AsmPrinter.  Instead, pass it in explicitly.

llvm-svn: 100306

llvm-svn: 100214

folder to be tolerant of debug info following the
branch(es) at the end of a block.

llvm-svn: 100168

llvm-svn: 99737

need them.

llvm-svn: 98937

llvm-svn: 98451

and passing off ownership to AsmPrinter.  Now MachineModuleInfo
creates it and owns it by value.  This allows us to use MCSymbols
more consistently throughout the rest of the code generator, and
simplifies a bit of code.  This also allows MachineFunction to 
keep an MCContext reference handy, and cleans up the TargetRegistry
interfaces for AsmPrinters.

llvm-svn: 98450

llvm-svn: 98394

remove it.

llvm-svn: 98390

is preparatory to having PEI's scavenged frame index value reuse logic
properly distinguish types of frame values (e.g., whether the value is
stack-pointer relative or frame-pointer relative).

No functionality change.

llvm-svn: 98086

DoInstructionSelection.  Inline "SelectRoot" into it from DAGISelHeader.
Sink some other stuff out of DAGISelHeader into SDISel.

Eliminate the various 'Indent' stuff from various targets, which dates
to when isel was recursive.

 17 files changed, 114 insertions(+), 430 deletions(-)

llvm-svn: 97555

llvm-svn: 97374

llvm-svn: 96504

llvm-svn: 96288

change to SelectionDAG build APIs.

llvm-svn: 96233

in hte generated dag isel fil.

llvm-svn: 96193

OutStreamer.AddBlankLine instead of textually.

llvm-svn: 95734

into TargetOpcodes.h.  #include the new TargetOpcodes.h
into MachineInstr.  Add new inline accessors (like isPHI())
to MachineInstr, and start using them throughout the 
codebase.

llvm-svn: 95687

llvm-svn: 95506

- o32 cc must pass all arguments in A0...A3 and stack regardless
if its type (but respect the alignment).
- Store all variable arguments back to the caller stack.

llvm-svn: 95500

the end of the instruction instead of expecting the caller to
do it.  This currently causes the asm-verbose instruction 
comments to be on the next line.

llvm-svn: 95178

llvm-svn: 95160

mccontext instead of having AsmPrinter do it.  This allows other 
types of MCStreamer's to be passed in.

llvm-svn: 95155

llvm-svn: 95130

llvm-svn: 94977

llvm-svn: 94969

llvm-svn: 94915

llvm-svn: 94914

it has before/end body hooks.

 lib/Target/Alpha/AsmPrinter/AlphaAsmPrinter.cpp |   49 ++-----------
 lib/Target/Mips/AsmPrinter/MipsAsmPrinter.cpp   |   87 ++++++------------------
 lib/Target/XCore/AsmPrinter/XCoreAsmPrinter.cpp |   56 +++------------
 test/CodeGen/XCore/ashr.ll                      |    2 
 4 files changed, 48 insertions(+), 146 deletions(-)

llvm-svn: 94741

Diffstat:
 6 files changed, 30 insertions(+), 284 deletions(-)

llvm-svn: 94727

Move the X86 implementation of function body emission up to 
AsmPrinter::EmitFunctionBody, which works by calling the virtual
EmitInstruction method.

llvm-svn: 94716

llvm-svn: 94698

Target independent isel should always pass along the "tail call" property. Change
target hook LowerCall's parameter "isTailCall" into a refernce. If the target
decides it's impossible to honor the tail call request, it should set isTailCall
to false to make target independent isel happy.

llvm-svn: 94626

Default HasSetDirective to true, since most targets have it.

The targets that claim to not have it probably do, or it is
spelled differently. These include Blackfin, Mips, Alpha, and
PIC16.  All of these except pic16 are normal ELF targets, so
they almost certainly have it.

llvm-svn: 94585