- Jun 28, 2011
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Jakob Stoklund Olesen authored
Drop the FpMov instructions, use plain COPY instead. Drop the FpSET/GET instruction for accessing fixed stack positions. Instead use normal COPY to/from ST registers around inline assembly, and provide a single new FpPOP_RETVAL instruction that can access the return value(s) from a call. This is still necessary since you cannot tell from the CALL instruction alone if it returns anything on the FP stack. Teach fast isel to use this. This provides a much more robust way of handling fixed stack registers - we can tolerate arbitrary FP stack instructions inserted around calls and inline assembly. Live range splitting could sometimes break x87 code by inserting spill code in unfortunate places. As a bonus we handle floating point inline assembly correctly now. llvm-svn: 134018
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Chad Rosier authored
llvm-svn: 134014
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Jakob Stoklund Olesen authored
llvm-svn: 134013
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Andrew Trick authored
llvm-svn: 134010
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Roman Divacky authored
llvm-svn: 134005
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Jay Foad authored
avoid getting embedded trailing null bytes in std::strings. llvm-svn: 133999
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Andrew Trick authored
llvm-svn: 133995
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Andrew Trick authored
llvm-svn: 133992
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Andrew Trick authored
llvm-svn: 133991
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Nick Lewycky authored
llvm-svn: 133990
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Rafael Espindola authored
llvm-svn: 133989
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Andrew Trick authored
llvm-svn: 133988
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Andrew Trick authored
evaluates all other IV exprs. llvm-svn: 133982
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Chandler Carruth authored
llvm-svn: 133981
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Jakob Stoklund Olesen authored
llvm-svn: 133978
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Jim Grosbach authored
When the destination operand is the same as the first source register operand for arithmetic instructions, the destination operand may be omitted. For example, the following two instructions are equivalent: and r1, #ff and r1, r1, #ff rdar://9672867 llvm-svn: 133973
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Evan Cheng authored
llvm-svn: 133967
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Jim Grosbach authored
Correctly parse the forms of the Thumb mov-immediate instruction: 1. 8-bit immediate 0-255. 2. 12-bit shifted-immediate. The 16-bit immediate "movw" form is also legal with just a "mov" mnemonic, but is not yet supported. More parser logic necessary there due to fixups. llvm-svn: 133966
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Evan Cheng authored
llvm-svn: 133962
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Andrew Trick authored
a bit more control over the order SCEVs are evaluated. llvm-svn: 133959
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Devang Patel authored
During bottom up fast-isel, instructions emitted to materalize registers are at top of basic block and do not have debug location. This may misguide debugger while entering the basic block and sometimes debugger provides semi useful view of current location to developer by picking up previous known location as current location. Assign a sensible location to the first instruction in a basic block, if it does not have one location derived from source file, so that debugger can provide meaningful user experience to developers in edge cases. llvm-svn: 133953
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- Jun 27, 2011
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Jakub Staszak authored
llvm-svn: 133946
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Jim Grosbach authored
Thumb2 MOV mnemonic can accept both cc_out and predication. We don't (yet) encode the instruction properly, but this gets the parsing part. llvm-svn: 133945
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Evan Cheng authored
llvm-svn: 133944
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Jim Grosbach authored
llvm-svn: 133939
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Jim Grosbach authored
llvm-svn: 133938
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Jim Grosbach authored
llvm-svn: 133936
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Jim Grosbach authored
Add aliases for the vpush/vpop mnemonics to the VFP load/store multiple writeback instructions w/ SP as the base pointer. rdar://9683231 llvm-svn: 133932
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Jim Grosbach authored
When the destination operand is the same as the first source register operand for arithmetic instructions, the destination operand may be omitted. For example, the following two instructions are equivalent: sub r2, r2, #6 sub r2, #6 rdar://9682597 llvm-svn: 133925
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Owen Anderson authored
The index stored in the RegDefIter is one after the current index. When getting the index, decrement it so that it points to the current element. Fixes an off-by-one bug encountered when trying to make use of MVT::untyped. llvm-svn: 133923
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Evan Cheng authored
into XXXGenRegisterInfo.inc. llvm-svn: 133922
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Andrew Trick authored
Removed the check that peeks past EXTRA_SUBREG, which I don't think makes sense any more. Intead treat it as a normal register def. No significant affect on x86 or ARM benchmarks. llvm-svn: 133917
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Jakob Stoklund Olesen authored
Patch by Sanjoy Das! llvm-svn: 133910
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Nick Lewycky authored
alloca that only holds a copy of a global and we're going to replace the users of the alloca with that global, just nuke the lifetime intrinsics. Part of PR10121. llvm-svn: 133905
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Nick Lewycky authored
passes as well. llvm-svn: 133904
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Jakob Stoklund Olesen authored
This allows for more live scratch registers which is needed to handle live ST registers before return and inline asm instructions. llvm-svn: 133903
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Jakob Stoklund Olesen authored
Both become <earlyclobber> defs on the INLINEASM MachineInstr, but we now use two different asm operand kinds. The new Kind_Clobber is treated identically to the old Kind_RegDefEarlyClobber for now, but x87 floating point stack inline assembly does care about the difference. This will pop a register off the stack: asm("fstp %st" : : "t"(x) : "st"); While this will pop the input and push an output: asm("fst %st" : "=&t"(r) : "t"(x)); We need to know if ST0 was a clobber or an output operand, and we can't depend on <dead> flags for that. llvm-svn: 133902
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Jakob Stoklund Olesen authored
The INLINEASM MachineInstrs have an immediate operand describing each original inline asm operand. Decode the bits in MachineInstr::print() so it is easier to read: INLINEASM <es:rorq $1,$0>, $0:[regdef], %vreg0<def>, %vreg1<def>, $1:[imm], 1, $2:[reguse] [tiedto:$0], %vreg2, %vreg3, $3:[regdef-ec], %EFLAGS<earlyclobber,imp-def> llvm-svn: 133901
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Rafael Espindola authored
llvm-svn: 133900
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Rafael Espindola authored
remove the analysis group. llvm-svn: 133899
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