an argument to every operand printing function.  Requires some slight
tweaks to x86, the only user.

llvm-svn: 24541

replaceAllUses'ing.

llvm-svn: 24539

llvm-svn: 24538

llvm-svn: 24537

llvm-svn: 24536

llvm-svn: 24535

changes allow us to generate the following code:

_foo:
        li r2, 0
        lvx v0, r2, r3
        vaddfp v0, v0, v0
        stvx v0, r2, r3
        blr

for this llvm:

void %foo(<4 x float>* %a) {
entry:
        %tmp1 = load <4 x float>* %a
        %tmp2 = add <4 x float> %tmp1, %tmp1
        store <4 x float> %tmp2, <4 x float>* %a
        ret void
}

llvm-svn: 24534

Getting in on the custom lowering thing, yay
evilness with fp setcc, yuck
trivial int select, hmmm
in memory args for functions, yay
DIV and REM, always handy.  They should be custom lowered though.

Lots more stuff compiles now (go go single source!).  Of course, none of it
probably works, but that is what the nightly tester can find out :)

llvm-svn: 24533

llvm-svn: 24531

file to become corrupted due to interactions between mmap'd memory segments
and file descriptors closing. The problem is completely avoiding by using
a third temporary file.

Patch provided by Evan Jones

llvm-svn: 24527

llvm-svn: 24526

llvm-svn: 24525

GlobalValue * and index pair. Update getGlobalAddress() for symmetry.

llvm-svn: 24524

llvm-svn: 24523

llvm-svn: 24522

that we can use the correct SPR numbers in the InstrInfo.td file.  This is
necessary to support VRsave.

llvm-svn: 24521

llvm-svn: 24520

llvm-svn: 24517

enhancements will be necessary to teach the code generator that since
there is no fmul, it will have to do vmaddfp, adding +0.0.

llvm-svn: 24516

contributed by Daniel Berlin, with a few cleanups here and there by me.

llvm-svn: 24515

llvm-svn: 24513

and make a few changes to the legalization machinery to support more than
16 types.

llvm-svn: 24511

createPPCPatternInstructionSelector -> createPPCISelPattern

llvm-svn: 24510

llvm-svn: 24505

this to be something sane, but in the mean time it is unused, so safe to
make something bogus.

llvm-svn: 24504

llvm-svn: 24503

llvm-svn: 24501

llvm-svn: 24500

old ones have been updated to implement the interface.

llvm-svn: 24499

llvm-svn: 24496

llvm-svn: 24495

Random sampling (aka Arnold and Ryder) profiling.  This is still preliminary, but it works on spec on x86 and alpha.  The idea is to allow profiling passes to remember what profiling they inserted, then a random sampling framework is inserted which consists of duplicated basic blocks (without profiling), such that at each backedge in the program and entry into every function, the framework chooses whether to use the instrumented code or the instrumentation free code.  The goal of such a framework is to make it reasonably cheap to do random sampling of very expensive profiling products (such as load-value profiling).

The code is organized into 3 parts (2 passes)
1) a linked set of profiling passes, which implement an analysis group (linked, like alias analysis are).  These insert profiling into the program, and remember what they inserted, so that at a later time they can be queried about any instruction.

2) a pass that handles inserting the random sampling framework.  This also has options to control how random samples are choosen.  Currently implemented are Global counters, register allocated global counters, and read cycle counter (see? there was a reason for it).

The profiling passes are almost identical to the existing ones (block, function, and null profiling is supported right now), and they are valid passes without the sampling framework (hence the existing passes can be unified with the new ones, not done yet).

Some things are a bit ugly still, but that should be fixed up soon enough.

Other todo? making the counter values not "magic 2^16 -1" values, but dynamically choosable.

llvm-svn: 24493

llvm-svn: 24492

llvm-svn: 24491

next up: support argument passing in memory, not just registers

llvm-svn: 24490

Registers.  Apologies to Jim if the scheduling info so far isn't accurate.

There's a few more things like VRsave support that need to be finished up
in my local tree before I can commit code that Does The Right Thing for
turning 4 x float into the various altivec packed float instructions.

llvm-svn: 24489

llvm-svn: 24488

llvm-svn: 24487

llvm-svn: 24486

llvm-svn: 24485