llvm-svn: 106234

for correctness' sake, it should be there.

llvm-svn: 106229

for the moment. The implementation of the libcall will follow.

Currently, the llvm-gcc knows when the intrinsics can be correctly handled by
the back end and only generates them in those cases, issuing libcalls directly
otherwise. That's too much coupling. The intrinsics should always be
generated and the back end decide how to handle them, be it with a libcall,
inline code, or whatever. This patch is a step in that direction.

rdar://8097623

llvm-svn: 106227

llvm-svn: 106226

matches what llvm-gcc and clang now produce.

llvm-svn: 106221

llvm-svn: 106219

llvm-svn: 106207

ISD::MEMBARRIER. v7 and v7 ARM mode continue to use the custom lowering.

llvm-svn: 106204

sets the legalize action to Expand.

llvm-svn: 106203

llvm-svn: 106201

previously would result in 'cannot yet select' errors.

llvm-svn: 106199

DW_OP_breg[0..31] to Dwarf.h.

Add "DW_" prefix to the llvm::dwarf::*String methods which did not
already have them in Dwarf.cpp.

llvm-svn: 106197

TLVP:

movl _a@TLVP, %eax

Daniel: Please review if you get a chance.
llvm-svn: 106194

llvm-svn: 106191

be evaluated for 'bit' operators

llvm-svn: 106185

llvm-svn: 106179

llvm-svn: 106178

The attribute class generation support is still somewhat limited.
See the accompanying clang commit for more details.

llvm-svn: 106174

llvm-svn: 106173

llvm-svn: 106171

llvm-svn: 106164

specification.

llvm-svn: 106162

This is before LiveVariables anyway, where these kill flags are recalculated.

llvm-svn: 106157

now, so there's no need to disable them.

llvm-svn: 106155

llvm-svn: 106154

LiveVariableAnalysis was a bit picky about a register only being redefined once,
but that really isn't necessary.

Here is an example of chained INSERT_SUBREGs that we can handle now:

68      %reg1040<def> = INSERT_SUBREG %reg1040, %reg1028<kill>, 14
                register: %reg1040 +[70,134:0)
76      %reg1040<def> = INSERT_SUBREG %reg1040, %reg1029<kill>, 13
                register: %reg1040 replace range with [70,78:1) RESULT: %reg1040,0.000000e+00 = [70,78:1)[78,134:0)  0@78-(134) 1@70-(78)
84      %reg1040<def> = INSERT_SUBREG %reg1040, %reg1030<kill>, 12
                register: %reg1040 replace range with [78,86:2) RESULT: %reg1040,0.000000e+00 = [70,78:1)[78,86:2)[86,134:0)  0@86-(134) 1@70-(78) 2@78-(86)
92      %reg1040<def> = INSERT_SUBREG %reg1040, %reg1031<kill>, 11
                register: %reg1040 replace range with [86,94:3) RESULT: %reg1040,0.000000e+00 = [70,78:1)[78,86:2)[86,94:3)[94,134:0)  0@94-(134) 1@70-(78) 2@78-(86) 3@86-(94)

rdar://problem/8096390

llvm-svn: 106152

when iterating through instructions. Yet more work for rdar://7797940

llvm-svn: 106149

The test should also likely have some FileCheck bits to validate the
output(?).

llvm-svn: 106146

MC/Mach-O: Rewrite atom association to be a final pass we do in Finish(), instead of tracking as part of emission.
 - This allows sharing more code with the MCObjectStreamer.

llvm-svn: 106143

llvm-svn: 106142

llvm-svn: 106141

object file format writers.

llvm-svn: 106140

llvm-svn: 106135

convention with a new call with a different calling convention.

llvm-svn: 106134

llvm-svn: 106126

llvm-svn: 106122

llvm-svn: 106121

llvm-svn: 106119

llvm-svn: 106117

llvm-svn: 106102