I am preparing another patch to address the failure that prompted
Chris to revert this patch earlier.

llvm-svn: 36649

llvm-svn: 36648

Emit correct register move information in eh frames for X86. This allows Shootout-C++/except to pass on x86/linux
with non-llvm-compiled (e.g. "native") unwind runtime.

llvm-svn: 36647

llvm-svn: 36646

llvm-svn: 36642

llvm-svn: 36641

trip function bodies like this:

define <2 x i64> @foo(<2 x i64> %x, <2 x i64> %y) {
        %tmp4 = bitcast <2 x i64> %y to <8 x i16>               ; <<8 x i16>> [#uses=1]
        %tmp5 = bitcast <2 x i64> %x to <8 x i16>               ; <<8 x i16>> [#uses=1]
        %tmp = add <8 x i16> %tmp5, %tmp4               ; <<8 x i16>> [#uses=1]
        %tmp6 = bitcast <8 x i16> %tmp to <2 x i64>             ; <<2 x i64>> [#uses=1]
        ret <2 x i64> %tmp6
}

llvm-svn: 36640

llvm-svn: 36639

llvm-svn: 36638

llvm-svn: 36637

llvm-svn: 36635

Support is incomplete, but more accurate than gcc's.

llvm-svn: 36634

1. Correct output offsets on Linux
2. Fix "style" of personality function. It shouldn't be indirect.

llvm-svn: 36633

llvm-svn: 36632

llvm-svn: 36630

llvm-svn: 36628

llvm-svn: 36627

llvm-svn: 36626

If call frame is not part of stack frame and no dynamic alloc, eliminateFrameIndex() must adjust SP offset with size of call frames.

llvm-svn: 36625

llvm-svn: 36622

llvm-svn: 36621

llvm-svn: 36620

llvm-svn: 36618

are done with them, start implementing ParseFunctionBody

llvm-svn: 36617

llvm-svn: 36615

llvm-svn: 36614

llvm-svn: 36610

llvm-svn: 36609

argument space for call sites in the function immediately on entry to the
current function. This eliminates the need for add/sub sp brackets around call
sites. However, this is not always a good idea. If the "call frame" is large and
the target load / store instructions have small immediate field to encode sp
offset, this can cause poor codegen. In the worst case, this can make it
impossible to scavenge a register if the reserved spill slot is pushed too far
apart from sp / fp.

llvm-svn: 36607

  produce two results.)
* Do not touch volatile loads.

llvm-svn: 36604

llvm-svn: 36602

llvm-svn: 36600

register, preallocate all input registers and the early clobbered output.

This fixes PR1357 and CodeGen/PowerPC/2007-04-30-InlineAsmEarlyClobber.ll

llvm-svn: 36599

llvm-svn: 36594

pieces of it.  No functionality change.

llvm-svn: 36592

llvm-svn: 36590

        # InlineAsm Start
        subfc r3,r5,r4
                subfze r4,r3
        # InlineAsm End

print:

        # InlineAsm Start
        subfc r3,r5,r4
        subfze r4,r3
        # InlineAsm End

llvm-svn: 36589

llvm-svn: 36588

llvm-svn: 36586

llvm-svn: 36585